fix claude-code-claude-fable-5-1-gatev2: the 5 re-optimized kernels were previous-round sources (assembled by hand); regenerated from the agent run dirs

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q4_K_n1024_k2560.json

@@ -0,0 +1,46 @@
+{
+ "name": "claude-code-claude-fable-5-1-gatev2_gemm_ggml_q4_K_n1024_k2560",
+ "definition": "gemm_ggml_q4_K_n1024_k2560",
+ "dataset": "llama.cpp",
+ "author": "claude-code-claude-fable-5-1-gatev2",
+ "description": "Claude Code + claude-fable-5-1 (sve2, 40/50 budget, E2E Qwen3.5-4B run 2026-09-21) submitted kernel v18.cpp for gemm_ggml_q4_K_n1024_k2560; harness files from reference-scalar. Harness speedup vs baseline-llamacpp-arm on c8g.xlarge: 3.107x.",
+ "spec": {
+  "language": "cpp",
+  "target_hardware": [
+   "graviton4",
+   "aarch64-sve2"
+  ],
+  "entry_point": "gemm.cpp::armbench_entry_gemm",
+  "dependencies": [],
+  "isa_features": [
+   "sve2"
+  ],
+  "compile_flags": [
+   "-O3",
+   "-march=armv9-a+sve2",
+   "-std=c++14"
+  ],
+  "link_flags": []
+ },
+ "sources": [
+  {
+   "path": "gemm.h",
+   "content": "#pragma once\n#include <cstdint>\n\n// Per-definition constants for this gemm Q4_K (weight-only, ggml packed\n// layout) specialisation.\n// C[m, n] = sum_k A[m, k] * B[n, k]  (B is the [N, K] \"weight\" matrix, transposed)\n// A is a raw bf16 bit pattern (uint16_t) -- activations stay at the bf16\n// baseline tier (real GGML never stores activations statically in a\n// k-quant format either -- see kernel.cpp for the dynamic quantization this\n// implies).\n// B is ggml's real block_q4_K layout: K/256 consecutive 144-byte super-blocks\n// per row (K_bytes = K/256 * 144), each\n//   struct block_q4_K {\n//     fp16    d;          // [0:2]   super-block scale for the 6-bit sub-scales\n//     fp16    dmin;       // [2:4]   super-block scale for the 6-bit sub-mins\n//     uint8_t scales[12]; // [4:16]  8 x (6-bit sc, 6-bit m), packed:\n//                         //   j<4:  sc = b[j] & 63,  m = b[j+4] & 63\n//                         //   j>=4: sc = (b[j+4] & 0xF) | ((b[j-4] >> 6) << 4)\n//                         //         m  = (b[j+4] >> 4)  | ((b[j]   >> 6) << 4)\n//     uint8_t qs[128];    // [16:144] nibbles: for 64-element chunk c (0..3),\n//                         //   byte qs[c*32+l] = elem c*64+l (low nibble)\n//                         //                   | elem c*64+32+l (high nibble)\n//   };\n// Sub-block j (32 elements) dequantizes as w = d*sc[j]*q - dmin*m[j].\n// Output accumulates/returns in fp32.\nnamespace gemm_def {\nconstexpr int N = 1024;\nconstexpr int K = 2560;\nconstexpr int K_blk = 10;\nconstexpr int K_bytes = 1440;\n} // namespace gemm_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// M is the only var dim. A: (M, K) bf16; B_blocks: (N, K_bytes) uint8 ggml\n// block_q4_K rows; output: (M, N) float32.\nvoid inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M);\n#ifdef __cplusplus\n}\n#endif\n"
+  },
+  {
+   "path": "gemm.cpp",
+   "content": "// Binding harness: forwards straight to inner_gemm (no derived dims needed).\n// ABI: armbench_entry_gemm(A*, output*, B_blocks*, M)\n#include \"gemm.h\"\nusing namespace gemm_def;\n\nextern \"C\" int armbench_entry_gemm(const uint16_t* A, float* output,\n                                    const uint8_t* B_blocks, int M)\n{\n    inner_gemm(A, output, B_blocks, M);\n    return 0;\n}\n"
+  },
+  {
+   "path": "kernel.cpp",
+   "content": "// Q4_K x Q8_K gemm, AArch64 i8mm (usmmla) 2x2-tile kernel.\n// v15: TBL2 per-chunk coefficients, TRN d/dmin, independent lo/hi chains.\n// v17: group-local activation layout [block][chunk][rowpair][128B] (LDP-friendly).\n// v18: M==1 path: min term via one usmmla on [bslo|bshi] with a [dmin,128dmin,..]\n//      fp coefficient (3 ops per column pair instead of 5), pairwise-add epilogue.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* base, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = base + (((size_t)i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t2 = 0; t2 < 4; ++t2) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t2));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t2));\n                vst1q_s8(dst + 32 * t2,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t2 + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t k1_128 = {1.f, 128.f, 1.f, 128.f};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t B = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    return vbslq_u8(kBitM, B, A);\n}\n\ntemplate <int R>\nKFN void run_rows(const int8_t* apack, const int8_t* bslo, const int8_t* bshi,\n                  const float* da, const uint8_t* B, float* out, int m_valid) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4));\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vcvt_f32_f16(hv);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t acc[R];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            for (int c = 0; c < 4; ++c) {\n                const int8_t* apc = apack + ((size_t)i * 4 + c) * R * 128;\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apc + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apc + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    acc[r] = vmlaq_s32(acc[r], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mh = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bshi + so * 16));\n                int32x4_t mm = vusmmlaq_s32(vshlq_n_s32(mh, 7), mn_op, vld1q_s8(bslo + so * 16));\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(acc[r]), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            if (2 * r < m_valid)     vst1_f32(out + (size_t)(2 * r) * N + 2 * np, row0);\n            if (2 * r + 1 < m_valid) vst1_f32(out + (size_t)(2 * r + 1) * N + 2 * np, row1);\n        }\n    }\n}\n\n// ---- M == 1: matrix-vector, USDOT over 4 columns per pass ----------------\n// q8: plain int8 activation row. bsc: per block 16 bytes = [bslo 0..7 | bshi 0..7].\nKFN void run_mv(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int nq = 0; nq < N / 4; ++nq) {\n        const uint8_t* bc[4];\n        for (int j = 0; j < 4; ++j) bc[j] = B + (size_t)(4 * nq + j) * K_bytes;\n        float32x4_t facc[4];\n        for (int j = 0; j < 4; ++j) facc[j] = vdupq_n_f32(0.f);\n        float32x4_t fmin01 = vdupq_n_f32(0.f), fmin23 = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const uint8_t* blk[4];\n            for (int j = 0; j < 4; ++j) blk[j] = bc[j] + i * 144;\n            uint8x16_t dec[4];\n            int32x4_t Slo[4], Shi[4];\n            for (int j = 0; j < 4; ++j) {\n                dec[j] = decode_scales(vld1q_u8(blk[j] + 4));\n                Slo[j] = vreinterpretq_s32_u8(vqtbl1q_u8(dec[j], kWlo));\n                Shi[j] = vreinterpretq_s32_u8(vqtbl1q_u8(dec[j], kWhi));\n            }\n            uint8x16_t mn01 = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec[0]), vreinterpretq_u64_u8(dec[1])));\n            uint8x16_t mn23 = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec[2]), vreinterpretq_u64_u8(dec[3])));\n            uint32_t w[4];\n            for (int j = 0; j < 4; ++j) memcpy(&w[j], blk[j], 4);\n            float32x4_t v01 = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w[0] | ((uint64_t)w[1] << 32))));\n            float32x4_t v23 = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w[2] | ((uint64_t)w[3] << 32))));\n            float32x4_t dmin01 = vmulq_f32(vtrn2q_f32(v01, v01), k1_128);\n            float32x4_t dmin23 = vmulq_f32(vtrn2q_f32(v23, v23), k1_128);\n\n            const int8_t* y = q8 + i * 256;\n            int32x4_t acc[4];\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                for (int j = 0; j < 4; ++j) {\n                    const uint8_t* q = blk[j] + 16 + 32 * c;\n                    uint8x16_t w0 = vld1q_u8(q), w1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(w0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(w1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(w0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(w1, 4), y3);\n                    if (c == 0) {\n                        acc[j] = vmulq_laneq_s32(ul, Slo[j], 0);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Slo[j], 1);\n                    } else if (c == 1) {\n                        acc[j] = vmlaq_laneq_s32(acc[j], ul, Slo[j], 2);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Slo[j], 3);\n                    } else if (c == 2) {\n                        acc[j] = vmlaq_laneq_s32(acc[j], ul, Shi[j], 0);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Shi[j], 1);\n                    } else {\n                        acc[j] = vmlaq_laneq_s32(acc[j], ul, Shi[j], 2);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Shi[j], 3);\n                    }\n                }\n            }\n            int8x16_t bs = vld1q_s8(bsc + (size_t)i * 16);\n            int32x4_t mm01 = vusmmlaq_s32(zero32, mn01, bs);   // [c0.lo, c0.hi, c1.lo, c1.hi]\n            int32x4_t mm23 = vusmmlaq_s32(zero32, mn23, bs);\n            fmin01 = vmlsq_f32(fmin01, vcvtq_f32_s32(mm01), dmin01);\n            fmin23 = vmlsq_f32(fmin23, vcvtq_f32_s32(mm23), dmin23);\n            facc[0] = vfmaq_laneq_f32(facc[0], vcvtq_f32_s32(acc[0]), v01, 0);\n            facc[1] = vfmaq_laneq_f32(facc[1], vcvtq_f32_s32(acc[1]), v01, 2);\n            facc[2] = vfmaq_laneq_f32(facc[2], vcvtq_f32_s32(acc[2]), v23, 0);\n            facc[3] = vfmaq_laneq_f32(facc[3], vcvtq_f32_s32(acc[3]), v23, 2);\n        }\n        float32x4_t o = vpaddq_f32(vpaddq_f32(facc[0], facc[1]), vpaddq_f32(facc[2], facc[3]));\n        o = vaddq_f32(o, vpaddq_f32(fmin01, fmin23));\n        vst1q_f32(out + 4 * nq, vmulq_n_f32(o, da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* ap, const int8_t* bl, const int8_t* bh, \\\n    const float* da, const uint8_t* B, float* out, int m_valid) { run_rows<R>(ap, bl, bh, da, B, out, m_valid); }\nTILE_ENTRY(rr8, 8)\nTILE_ENTRY(rr4, 4)\nTILE_ENTRY(rr2, 2)\nTILE_ENTRY(rr1, 1)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv4(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bslo, bshi;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bslo.resize((size_t)P * K_blk * 16);\n        bshi.resize((size_t)P * K_blk * 16);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) int8_t q8[2][K];\n    int16_t bs[2][K_blk * 8];\n\n    if (M == 1) {\n        alignas(16) int8_t bsc[K_blk * 16];\n        quantize_row(A, q8[0], bs[0], &dav[0]);\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs[0][i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv4(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bs[rr], &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bs[rr], 0, sizeof(bs[rr]));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n            for (int i = 0; i < K_blk; ++i) {\n                const size_t so = (size_t)pp * K_blk + i;\n                for (int rr = 0; rr < 2; ++rr) {\n                    for (int j = 0; j < 8; ++j) {\n                        int v = bs[rr][i * 8 + j];\n                        int lo = ((v + 64) & 127) - 64;\n                        int hi = (v - lo) >> 7;\n                        bslo[so * 16 + rr * 8 + j] = (int8_t)lo;\n                        bshi[so * 16 + rr * 8 + j] = (int8_t)hi;\n                    }\n                }\n            }\n        }\n        p += R;\n    }\n\n    p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        const int8_t* ap = apack.data() + (size_t)p * K_blk * 512;\n        const int8_t* bl = bslo.data() + (size_t)p * K_blk * 16;\n        const int8_t* bh = bshi.data() + (size_t)p * K_blk * 16;\n        const float* dv = dav.data() + (size_t)p * 2;\n        float* out = output + (size_t)(2 * p) * N;\n        const int m_valid = M - 2 * p;\n        if (R == 8)      rr8(ap, bl, bh, dv, B_blocks, out, m_valid);\n        else if (R == 4) rr4(ap, bl, bh, dv, B_blocks, out, m_valid);\n        else if (R == 2) rr2(ap, bl, bh, dv, B_blocks, out, m_valid);\n        else             rr1(ap, bl, bh, dv, B_blocks, out, m_valid);\n        p += R;\n    }\n}\n"
+  }
+ ],
+ "provenance": {
+  "run": "e2e-fable-lane1",
+  "submitted_version": "v18.cpp",
+  "time_speedup": 3.107135600986274,
+  "evaluations": 23,
+  "server_calls": 50
+ }
+}

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q4_K_n2560_k4096.json

@@ -0,0 +1,46 @@
+{
+ "name": "claude-code-claude-fable-5-1-gatev2_gemm_ggml_q4_K_n2560_k4096",
+ "definition": "gemm_ggml_q4_K_n2560_k4096",
+ "dataset": "llama.cpp",
+ "author": "claude-code-claude-fable-5-1-gatev2",
+ "description": "Claude Code + claude-fable-5-1 (sve2, 40/50 budget, E2E Qwen3.5-4B run 2026-09-21) submitted kernel v22.cpp for gemm_ggml_q4_K_n2560_k4096; harness files from reference-scalar. Harness speedup vs baseline-llamacpp-arm on c8g.xlarge: 2.947x.",
+ "spec": {
+  "language": "cpp",
+  "target_hardware": [
+   "graviton4",
+   "aarch64-sve2"
+  ],
+  "entry_point": "gemm.cpp::armbench_entry_gemm",
+  "dependencies": [],
+  "isa_features": [
+   "sve2"
+  ],
+  "compile_flags": [
+   "-O3",
+   "-march=armv9-a+sve2",
+   "-std=c++14"
+  ],
+  "link_flags": []
+ },
+ "sources": [
+  {
+   "path": "gemm.h",
+   "content": "#pragma once\n#include <cstdint>\n\n// Per-definition constants for this gemm Q4_K (weight-only, ggml packed\n// layout) specialisation.\n// C[m, n] = sum_k A[m, k] * B[n, k]  (B is the [N, K] \"weight\" matrix, transposed)\n// A is a raw bf16 bit pattern (uint16_t) -- activations stay at the bf16\n// baseline tier (real GGML never stores activations statically in a\n// k-quant format either -- see kernel.cpp for the dynamic quantization this\n// implies).\n// B is ggml's real block_q4_K layout: K/256 consecutive 144-byte super-blocks\n// per row (K_bytes = K/256 * 144), each\n//   struct block_q4_K {\n//     fp16    d;          // [0:2]   super-block scale for the 6-bit sub-scales\n//     fp16    dmin;       // [2:4]   super-block scale for the 6-bit sub-mins\n//     uint8_t scales[12]; // [4:16]  8 x (6-bit sc, 6-bit m), packed:\n//                         //   j<4:  sc = b[j] & 63,  m = b[j+4] & 63\n//                         //   j>=4: sc = (b[j+4] & 0xF) | ((b[j-4] >> 6) << 4)\n//                         //         m  = (b[j+4] >> 4)  | ((b[j]   >> 6) << 4)\n//     uint8_t qs[128];    // [16:144] nibbles: for 64-element chunk c (0..3),\n//                         //   byte qs[c*32+l] = elem c*64+l (low nibble)\n//                         //                   | elem c*64+32+l (high nibble)\n//   };\n// Sub-block j (32 elements) dequantizes as w = d*sc[j]*q - dmin*m[j].\n// Output accumulates/returns in fp32.\nnamespace gemm_def {\nconstexpr int N = 2560;\nconstexpr int K = 4096;\nconstexpr int K_blk = 16;\nconstexpr int K_bytes = 2304;\n} // namespace gemm_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// M is the only var dim. A: (M, K) bf16; B_blocks: (N, K_bytes) uint8 ggml\n// block_q4_K rows; output: (M, N) float32.\nvoid inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M);\n#ifdef __cplusplus\n}\n#endif\n"
+  },
+  {
+   "path": "gemm.cpp",
+   "content": "// Binding harness: forwards straight to inner_gemm (no derived dims needed).\n// ABI: armbench_entry_gemm(A*, output*, B_blocks*, M)\n#include \"gemm.h\"\nusing namespace gemm_def;\n\nextern \"C\" int armbench_entry_gemm(const uint16_t* A, float* output,\n                                    const uint8_t* B_blocks, int M)\n{\n    inner_gemm(A, output, B_blocks, M);\n    return 0;\n}\n"
+  },
+  {
+   "path": "kernel.cpp",
+   "content": "// Q4_K x Q8_K gemm, AArch64 i8mm (usmmla) 2x2-tile kernel.\n// v14: 5-op scale decode, TBL2 per-chunk coefficients, TRN1/TRN2 d/dmin,\n// independent lo/hi usmmla chains, activation layout [block][chunk][rowpair][128B],\n// K-split halves for R=8, split even/odd MLA chains for R<=2, USDOT M==1 path\n// with single-usmmla min term and next-4-column prefetch.\n// v17: v14 + M==1 prefetch two passes (8 columns) ahead.\n// v18: v17 + CP=2 column pairs per pass for the R<=2 tiles (activation loads\n// shared across the two column pairs, two independent streams per block).\n// v20: v18 + 4-way K-split for the R=8 tile (16KB activation panel per pass).\n// v22: v20 without software prefetch in the row tiles.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\n// Pack row pair r of a group holding R row pairs: layout [i][c][r][128].\nKFN void pack_pair(const int8_t* q0, const int8_t* q1, int8_t* grp, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = grp + (((size_t)i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\n\n// out bytes: [sc0..3, sc4..7, mn0..3, mn4..7]  (5 ops: 2 tbl, ushl, ushr, bsl)\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t B = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    return vbslq_u8(kBitM, B, A);\n}\n\ntemplate <int R, int CP>\nKFN void run_rows(const int8_t* apack, const int8_t* bslo, const int8_t* bshi,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, bool accum) {\n    constexpr bool SPLIT = (R <= 2);\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; np += CP) {\n        const uint8_t* b0[CP];\n        const uint8_t* b1[CP];\n        for (int cp = 0; cp < CP; ++cp) {\n            b0[cp] = B + (size_t)(2 * (np + cp)) * K_bytes;\n            b1[cp] = b0[cp] + K_bytes;\n        }\n        float32x4_t facc[CP][R];\n        for (int cp = 0; cp < CP; ++cp)\n            for (int r = 0; r < R; ++r) facc[cp][r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            uint8x16x2_t dec[CP];\n            uint8x16_t mn_op[CP];\n            float32x4_t dvec[CP], dminvec[CP];\n            for (int cp = 0; cp < CP; ++cp) {\n                const uint8_t* blk0 = b0[cp] + i * 144;\n                const uint8_t* blk1 = b1[cp] + i * 144;\n                dec[cp].val[0] = decode_scales(vld1q_u8(blk0 + 4));\n                dec[cp].val[1] = decode_scales(vld1q_u8(blk1 + 4));\n                mn_op[cp] = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec[cp].val[0]), vreinterpretq_u64_u8(dec[cp].val[1])));\n                uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n                float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n                float32x4_t v = vcvt_f32_f16(hv);\n                dvec[cp] = vtrn1q_f32(v, v);\n                dminvec[cp] = vtrn2q_f32(v, v);\n            }\n\n            int32x4_t acc[CP][R], acc2[CP][R];\n            const int8_t* abase = apack + (size_t)i * 4 * R * 128;\n            for (int c = 0; c < 4; ++c) {\n                const int8_t* cbase = abase + (size_t)c * R * 128;\n                for (int cp = 0; cp < CP; ++cp) {\n                    const uint8_t* q0 = b0[cp] + i * 144 + 16;\n                    const uint8_t* q1 = b1[cp] + i * 144 + 16;\n                    int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec[cp], kCoef[2 * c]));\n                    int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec[cp], kCoef[2 * c + 1]));\n                    uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                    uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                    uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                    uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                    uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                    uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                    uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                    uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                    uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                    uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                    for (int r = 0; r < R; ++r) {\n                        const int8_t* ap = cbase + r * 128;\n                        int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                        uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                        uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                        uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                        acc[cp][r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[cp][r], uu, cE);\n                    }\n                    uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                    uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                    for (int r = 0; r < R; ++r) {\n                        const int8_t* ap = cbase + r * 128 + 64;\n                        int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                        uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                        uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                        uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                        if (SPLIT) acc2[cp][r] = (c == 0) ? vmulq_s32(uu, cO) : vmlaq_s32(acc2[cp][r], uu, cO);\n                        else       acc[cp][r] = vmlaq_s32(acc[cp][r], uu, cO);\n                    }\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int8x16_t bh = vld1q_s8(bshi + so * 16);\n                int8x16_t bl = vld1q_s8(bslo + so * 16);\n                for (int cp = 0; cp < CP; ++cp) {\n                    int32x4_t mh = vusmmlaq_s32(zero32, mn_op[cp], bh);\n                    int32x4_t mm = vusmmlaq_s32(vshlq_n_s32(mh, 7), mn_op[cp], bl);\n                    int32x4_t a = SPLIT ? vaddq_s32(acc[cp][r], acc2[cp][r]) : acc[cp][r];\n                    facc[cp][r] = vmlaq_f32(facc[cp][r], vcvtq_f32_s32(a), dvec[cp]);\n                    facc[cp][r] = vmlsq_f32(facc[cp][r], vcvtq_f32_s32(mm), dminvec[cp]);\n                }\n            }\n        }\n        for (int cp = 0; cp < CP; ++cp) {\n            for (int r = 0; r < R; ++r) {\n                float32x4_t f = facc[cp][r];\n                float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n                float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n                float* o0 = out + (size_t)(2 * r) * N + 2 * (np + cp);\n                float* o1 = out + (size_t)(2 * r + 1) * N + 2 * (np + cp);\n                if (accum) {\n                    if (2 * r < m_valid)     row0 = vadd_f32(row0, vld1_f32(o0));\n                    if (2 * r + 1 < m_valid) row1 = vadd_f32(row1, vld1_f32(o1));\n                }\n                if (2 * r < m_valid)     vst1_f32(o0, row0);\n                if (2 * r + 1 < m_valid) vst1_f32(o1, row1);\n            }\n        }\n    }\n}\n\n// ---- M == 1: matrix-vector, USDOT over 4 columns per pass ----------------\nKFN void run_mv(const int8_t* q8, const int8_t* bsp, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    const float32x4_t k128 = {1.f, 128.f, 1.f, 128.f};\n    for (int nq = 0; nq < N / 4; ++nq) {\n        const uint8_t* bc[4];\n        for (int j = 0; j < 4; ++j) bc[j] = B + (size_t)(4 * nq + j) * K_bytes;\n        const bool pf = (nq + 2 < N / 4);\n        float32x4_t facc[4];\n        for (int j = 0; j < 4; ++j) facc[j] = vdupq_n_f32(0.f);\n        float32x4_t fmin01 = vdupq_n_f32(0.f), fmin23 = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const uint8_t* blk[4];\n            for (int j = 0; j < 4; ++j) blk[j] = bc[j] + i * 144;\n            if (pf) {\n                for (int j = 0; j < 4; ++j) {\n                    const uint8_t* nb = blk[j] + 8 * K_bytes;\n                    __builtin_prefetch(nb, 0, 3);\n                    __builtin_prefetch(nb + 64, 0, 3);\n                    __builtin_prefetch(nb + 128, 0, 3);\n                }\n            }\n            uint8x16_t dec[4];\n            int32x4_t Slo[4], Shi[4];\n            for (int j = 0; j < 4; ++j) {\n                dec[j] = decode_scales(vld1q_u8(blk[j] + 4));\n                Slo[j] = vreinterpretq_s32_u8(vqtbl1q_u8(dec[j], kWlo));\n                Shi[j] = vreinterpretq_s32_u8(vqtbl1q_u8(dec[j], kWhi));\n            }\n            uint8x16_t mn01 = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec[0]), vreinterpretq_u64_u8(dec[1])));\n            uint8x16_t mn23 = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec[2]), vreinterpretq_u64_u8(dec[3])));\n            uint32_t w[4];\n            for (int j = 0; j < 4; ++j) memcpy(&w[j], blk[j], 4);\n            float32x4_t v01 = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w[0] | ((uint64_t)w[1] << 32))));\n            float32x4_t v23 = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w[2] | ((uint64_t)w[3] << 32))));\n            float32x4_t dmin01 = vtrn2q_f32(v01, v01), dmin23 = vtrn2q_f32(v23, v23);\n\n            const int8_t* y = q8 + i * 256;\n            int32x4_t acc[4];\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                for (int j = 0; j < 4; ++j) {\n                    const uint8_t* q = blk[j] + 16 + 32 * c;\n                    uint8x16_t w0 = vld1q_u8(q), w1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(w0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(w1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(w0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(w1, 4), y3);\n                    if (c == 0) {\n                        acc[j] = vmulq_laneq_s32(ul, Slo[j], 0);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Slo[j], 1);\n                    } else if (c == 1) {\n                        acc[j] = vmlaq_laneq_s32(acc[j], ul, Slo[j], 2);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Slo[j], 3);\n                    } else if (c == 2) {\n                        acc[j] = vmlaq_laneq_s32(acc[j], ul, Shi[j], 0);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Shi[j], 1);\n                    } else {\n                        acc[j] = vmlaq_laneq_s32(acc[j], ul, Shi[j], 2);\n                        acc[j] = vmlaq_laneq_s32(acc[j], uh, Shi[j], 3);\n                    }\n                }\n            }\n            int8x16_t bsv = vld1q_s8(bsp + (size_t)i * 16);\n            int32x4_t mm01 = vusmmlaq_s32(zero32, mn01, bsv);\n            int32x4_t mm23 = vusmmlaq_s32(zero32, mn23, bsv);\n            fmin01 = vmlaq_f32(fmin01, vcvtq_f32_s32(mm01), dmin01);\n            fmin23 = vmlaq_f32(fmin23, vcvtq_f32_s32(mm23), dmin23);\n            facc[0] = vfmaq_laneq_f32(facc[0], vcvtq_f32_s32(acc[0]), v01, 0);\n            facc[1] = vfmaq_laneq_f32(facc[1], vcvtq_f32_s32(acc[1]), v01, 2);\n            facc[2] = vfmaq_laneq_f32(facc[2], vcvtq_f32_s32(acc[2]), v23, 0);\n            facc[3] = vfmaq_laneq_f32(facc[3], vcvtq_f32_s32(acc[3]), v23, 2);\n        }\n        float32x4_t fs = vpaddq_f32(vpaddq_f32(facc[0], facc[1]), vpaddq_f32(facc[2], facc[3]));\n        float32x4_t fm = vpaddq_f32(vmulq_f32(fmin01, k128), vmulq_f32(fmin23, k128));\n        vst1q_f32(out + 4 * nq, vmulq_n_f32(vsubq_f32(fs, fm), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, CP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* ap, const int8_t* bl, const int8_t* bh, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, bool accum) \\\n    { run_rows<R, CP>(ap, bl, bh, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, 1)\nTILE_ENTRY(rr4, 4, 1)\nTILE_ENTRY(rr2, 2, 2)\nTILE_ENTRY(rr1, 1, 2)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv4(const int8_t* q8, const int8_t* bsp,\n    float da, const uint8_t* B, float* out) { run_mv(q8, bsp, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bslo, bshi;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bslo.resize((size_t)P * K_blk * 16);\n        bshi.resize((size_t)P * K_blk * 16);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) int8_t q8[2][K];\n    int16_t bs[2][K_blk * 8];\n\n    if (M == 1) {\n        float da;\n        quantize_row(A, q8[0], bs[0], &da);\n        alignas(16) int8_t bsp[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs[0][i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsp[i * 16 + j] = (int8_t)lo;\n                bsp[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv4(q8[0], bsp, da, B_blocks, output);\n        return;\n    }\n\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        int8_t* grp = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bs[rr], &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bs[rr], 0, sizeof(bs[rr]));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair(q8[0], q8[1], grp, R, r);\n            for (int i = 0; i < K_blk; ++i) {\n                const size_t so = (size_t)pp * K_blk + i;\n                for (int rr = 0; rr < 2; ++rr) {\n                    for (int j = 0; j < 8; ++j) {\n                        int v = bs[rr][i * 8 + j];\n                        int lo = ((v + 64) & 127) - 64;\n                        int hi = (v - lo) >> 7;\n                        bslo[so * 16 + rr * 8 + j] = (int8_t)lo;\n                        bshi[so * 16 + rr * 8 + j] = (int8_t)hi;\n                    }\n                }\n            }\n        }\n        const int8_t* bl = bslo.data() + (size_t)p * K_blk * 16;\n        const int8_t* bh = bshi.data() + (size_t)p * K_blk * 16;\n        const float* dv = dav.data() + (size_t)p * 2;\n        float* out = output + (size_t)(2 * p) * N;\n        const int m_valid = M - 2 * p;\n        if (R == 8) {\n            const int Q = K_blk / 4;\n            for (int s = 0; s < 4; ++s)\n                rr8(grp, bl, bh, dv, B_blocks, out, m_valid, s * Q, (s + 1) * Q, s != 0);\n        }\n        else if (R == 4) rr4(grp, bl, bh, dv, B_blocks, out, m_valid, 0, K_blk, false);\n        else if (R == 2) rr2(grp, bl, bh, dv, B_blocks, out, m_valid, 0, K_blk, false);\n        else             rr1(grp, bl, bh, dv, B_blocks, out, m_valid, 0, K_blk, false);\n        p += R;\n    }\n}\n"
+  }
+ ],
+ "provenance": {
+  "run": "e2e-fable-lane1",
+  "submitted_version": "v22.cpp",
+  "time_speedup": 2.9470688355957457,
+  "evaluations": 22,
+  "server_calls": 47
+ }
+}

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q4_K_n2560_k9216.json

@@ -0,0 +1,46 @@
+{
+ "name": "claude-code-claude-fable-5-1-gatev2_gemm_ggml_q4_K_n2560_k9216",
+ "definition": "gemm_ggml_q4_K_n2560_k9216",
+ "dataset": "llama.cpp",
+ "author": "claude-code-claude-fable-5-1-gatev2",
+ "description": "Claude Code + claude-fable-5-1 (sve2, 40/50 budget, E2E Qwen3.5-4B run 2026-09-21) submitted kernel v18.cpp for gemm_ggml_q4_K_n2560_k9216; harness files from reference-scalar. Harness speedup vs baseline-llamacpp-arm on c8g.xlarge: 2.869x.",
+ "spec": {
+  "language": "cpp",
+  "target_hardware": [
+   "graviton4",
+   "aarch64-sve2"
+  ],
+  "entry_point": "gemm.cpp::armbench_entry_gemm",
+  "dependencies": [],
+  "isa_features": [
+   "sve2"
+  ],
+  "compile_flags": [
+   "-O3",
+   "-march=armv9-a+sve2",
+   "-std=c++14"
+  ],
+  "link_flags": []
+ },
+ "sources": [
+  {
+   "path": "gemm.h",
+   "content": "#pragma once\n#include <cstdint>\n\n// Per-definition constants for this gemm Q4_K (weight-only, ggml packed\n// layout) specialisation.\n// C[m, n] = sum_k A[m, k] * B[n, k]  (B is the [N, K] \"weight\" matrix, transposed)\n// A is a raw bf16 bit pattern (uint16_t) -- activations stay at the bf16\n// baseline tier (real GGML never stores activations statically in a\n// k-quant format either -- see kernel.cpp for the dynamic quantization this\n// implies).\n// B is ggml's real block_q4_K layout: K/256 consecutive 144-byte super-blocks\n// per row (K_bytes = K/256 * 144), each\n//   struct block_q4_K {\n//     fp16    d;          // [0:2]   super-block scale for the 6-bit sub-scales\n//     fp16    dmin;       // [2:4]   super-block scale for the 6-bit sub-mins\n//     uint8_t scales[12]; // [4:16]  8 x (6-bit sc, 6-bit m), packed:\n//                         //   j<4:  sc = b[j] & 63,  m = b[j+4] & 63\n//                         //   j>=4: sc = (b[j+4] & 0xF) | ((b[j-4] >> 6) << 4)\n//                         //         m  = (b[j+4] >> 4)  | ((b[j]   >> 6) << 4)\n//     uint8_t qs[128];    // [16:144] nibbles: for 64-element chunk c (0..3),\n//                         //   byte qs[c*32+l] = elem c*64+l (low nibble)\n//                         //                   | elem c*64+32+l (high nibble)\n//   };\n// Sub-block j (32 elements) dequantizes as w = d*sc[j]*q - dmin*m[j].\n// Output accumulates/returns in fp32.\nnamespace gemm_def {\nconstexpr int N = 2560;\nconstexpr int K = 9216;\nconstexpr int K_blk = 36;\nconstexpr int K_bytes = 5184;\n} // namespace gemm_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// M is the only var dim. A: (M, K) bf16; B_blocks: (N, K_bytes) uint8 ggml\n// block_q4_K rows; output: (M, N) float32.\nvoid inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M);\n#ifdef __cplusplus\n}\n#endif\n"
+  },
+  {
+   "path": "gemm.cpp",
+   "content": "// Binding harness: forwards straight to inner_gemm (no derived dims needed).\n// ABI: armbench_entry_gemm(A*, output*, B_blocks*, M)\n#include \"gemm.h\"\nusing namespace gemm_def;\n\nextern \"C\" int armbench_entry_gemm(const uint16_t* A, float* output,\n                                    const uint8_t* B_blocks, int M)\n{\n    inner_gemm(A, output, B_blocks, M);\n    return 0;\n}\n"
+  },
+  {
+   "path": "kernel.cpp",
+   "content": "// Q4_K x Q8_K gemm, AArch64 i8mm (usmmla) 2x2-tile kernel for K=9216 (K_blk=36).\n// v18: v16 with prefetch distance 1 column pair for every tile path.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\n#ifndef KS8\n#define KS8 4      // blocks per pass for R=8  (panel 8*KS8*512 B)\n#endif\n#ifndef KS4\n#define KS4 6      // blocks per pass for R=4\n#endif\n#ifndef KS2\n#define KS2 36\n#endif\n#ifndef KS1\n#define KS1 36\n#endif\n#ifndef MVPF\n#define MVPF 4     // columns ahead in mv path\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\n// pack row pair (q0,q1) into group layout [i][c][r][128] (group of R row pairs)\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\n\n// out bytes: [sc0..3, sc4..7, mn0..3, mn4..7]  (5 ops: 2 tbl, ushl, ushr, bit)\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n\n// gp: group activation base ([i][c][r][128]); bslo/bshi: row-pair-major\n// ((r*K_blk + i)*16) for this group; out: row 2*p0 of output.\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bslo, const int8_t* bshi,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(pf0 + i * 144);\n            PF_BLK(pf1 + i * 144);\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4));\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vcvt_f32_f16(hv);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n            for (int c = 0; c < 4; ++c) {\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    if (SPLIT) accH[r] = (c == 0) ? vmulq_s32(uu, cO) : vmlaq_s32(accH[r], uu, cO);\n                    else       acc[r] = vmlaq_s32(acc[r], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mh = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bshi + so * 16));\n                int32x4_t mm = vusmmlaq_s32(vshlq_n_s32(mh, 7), mn_op, vld1q_s8(bslo + so * 16));\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            float* o0 = out + (size_t)(2 * r) * N + 2 * np;\n            float* o1 = o0 + N;\n            if (accum) {\n                if (2 * r < m_valid)     vst1_f32(o0, vadd_f32(vld1_f32(o0), row0));\n                if (2 * r + 1 < m_valid) vst1_f32(o1, vadd_f32(vld1_f32(o1), row1));\n            } else {\n                if (2 * r < m_valid)     vst1_f32(o0, row0);\n                if (2 * r + 1 < m_valid) vst1_f32(o1, row1);\n            }\n        }\n    }\n}\n\n// ---- M == 1: matrix-vector, USDOT, 4 columns per pass processed as 2 pairs --\n// q8: plain int8 activation row (K bytes). bsc: per block 16 bytes,\n// bytes 0..7 = row's low split bsums, bytes 8..15 = high split bsums.\nKFN void run_mv(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int nq = 0; nq < N / 4; ++nq) {\n        const uint8_t* bc0 = B + (size_t)(4 * nq) * K_bytes;\n        float32x4_t facc[4];\n        for (int j = 0; j < 4; ++j) facc[j] = vdupq_n_f32(0.f);\n        float32x4_t fmin[2] = {vdupq_n_f32(0.f), vdupq_n_f32(0.f)};\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            for (int pr = 0; pr < 2; ++pr) {\n                const uint8_t* blk0 = bc0 + (size_t)(2 * pr) * K_bytes + i * 144;\n                const uint8_t* blk1 = blk0 + K_bytes;\n                PF_BLK(blk0 + MVPF * K_bytes);\n                PF_BLK(blk1 + MVPF * K_bytes);\n                uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n                uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n                int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n                int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n                int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n                int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n                uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n                uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n                float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32))));\n                float32x4_t cmin = vmulq_f32(vtrn2q_f32(v, v), kMinMul);\n                int32x4_t acc0 = zero32, acc1 = zero32;\n                for (int c = 0; c < 4; ++c) {\n                    int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                    int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                    int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                    int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                    {\n                        const uint8_t* q = blk0 + 16 + 32 * c;\n                        uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                        int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                        ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                        int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                        uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                        if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                        else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                        else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                        else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                    }\n                    {\n                        const uint8_t* q = blk1 + 16 + 32 * c;\n                        uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                        int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                        ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                        int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                        uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                        if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                        else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                        else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                        else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                    }\n                }\n                int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);   // [mn0.lo, mn0.hi, mn1.lo, mn1.hi]\n                fmin[pr] = vmlsq_f32(fmin[pr], vcvtq_f32_s32(mm), cmin);\n                facc[2 * pr]     = vfmaq_laneq_f32(facc[2 * pr],     vcvtq_f32_s32(acc0), v, 0);\n                facc[2 * pr + 1] = vfmaq_laneq_f32(facc[2 * pr + 1], vcvtq_f32_s32(acc1), v, 2);\n            }\n        }\n        float32x4_t mins = vpaddq_f32(fmin[0], fmin[1]);   // [c0, c1, c2, c3]\n        float32x4_t sums = vpaddq_f32(vpaddq_f32(facc[0], facc[1]), vpaddq_f32(facc[2], facc[3]));\n        vst1q_f32(out + 4 * nq, vmulq_n_f32(vaddq_f32(sums, mins), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bl, const int8_t* bh, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bl, bh, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, true, 1)\nTILE_ENTRY(rr1, 1, true, 1)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv4(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bslo, bshi;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bslo.resize((size_t)P * K_blk * 16);\n        bshi.resize((size_t)P * K_blk * 16);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n    static int16_t bs[2][K_blk * 8];\n\n    if (M == 1) {\n        quantize_row(A, q8[0], bs[0], &dav[0]);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs[0][i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv4(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    // group structure: descending R (8..., 4, 2, 1)\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bs[rr], &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bs[rr], 0, sizeof(bs[rr]));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n            for (int i = 0; i < K_blk; ++i) {\n                const size_t so = (size_t)pp * K_blk + i;\n                for (int rr = 0; rr < 2; ++rr) {\n                    for (int j = 0; j < 8; ++j) {\n                        int v = bs[rr][i * 8 + j];\n                        int lo = ((v + 64) & 127) - 64;\n                        int hi = (v - lo) >> 7;\n                        bslo[so * 16 + rr * 8 + j] = (int8_t)lo;\n                        bshi[so * 16 + rr * 8 + j] = (int8_t)hi;\n                    }\n                }\n            }\n        }\n        p += R;\n    }\n\n    // pass-major over runs of groups sharing the same R\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bl = bslo.data() + (size_t)p0 * K_blk * 16;\n                const int8_t* bh = bshi.data() + (size_t)p0 * K_blk * 16;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bl, bh, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bl, bh, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bl, bh, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bl, bh, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+  }
+ ],
+ "provenance": {
+  "run": "e2e-fable-lane1",
+  "submitted_version": "v18.cpp",
+  "time_speedup": 2.8688158216539787,
+  "evaluations": 19,
+  "server_calls": 41
+ }
+}

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q4_K_n4096_k2560.json

@@ -33,14 +33,14 @@
   },
   {
    "path": "kernel.cpp",
-   "content": "// Q4_K x Q8_K gemm, AArch64 i8mm (usmmla) 2x2-tile kernel for K=2560 (K_blk=10), N=4096.\n// FINAL (= v12): usmmla 2x2 tiles, group activation layout [i][c][r][128], single K pass\n// (KS8=KS4=KS2=KS1=10; panels 40/20/10/5 KB), split even/odd MLA chains for R<=2, pass-major\n// dispatch, BIT-based 5-op scale decode, TBL2 per-chunk coefficients, int8 bsums with one global\n// pow2 shift (single usmmla min term; 2^s folded into dmin), buffered output epilogue (NB=64\n// column pairs in a contiguous scratch, row-wise flush; output rows are 16KB-strided => same L1\n// set), dedicated M==1 USDOT path (pair-outer, 4 columns ahead PLDL1STRM), SW prefetch of the\n// next column pair's B blocks with full 3-line coverage per block.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 4\n#endif\n#ifndef NB\n#define NB 64\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vld1q_f32(src + j));\n        }\n    }\n}\n\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq, float mscale,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    const float32x4_t vms = {1.f, mscale, 1.f, mscale};\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(pf0 + i * 144);\n            PF_BLK(pf1 + i * 144);\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4));\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vmulq_f32(vcvt_f32_f16(hv), vms);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n            for (int c = 0; c < 4; ++c) {\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    if (SPLIT) accH[r] = (c == 0) ? vmulq_s32(uu, cO) : vmlaq_s32(accH[r], uu, cO);\n                    else       acc[r] = vmlaq_s32(acc[r], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mm = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 16));\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int nq = 0; nq < N / 4; ++nq) {\n        const uint8_t* bc0 = B + (size_t)(4 * nq) * K_bytes;\n        float32x4_t facc[4];\n        for (int j = 0; j < 4; ++j) facc[j] = vdupq_n_f32(0.f);\n        float32x4_t fmin[2] = {vdupq_n_f32(0.f), vdupq_n_f32(0.f)};\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            for (int pr = 0; pr < 2; ++pr) {\n                const uint8_t* blk0 = bc0 + (size_t)(2 * pr) * K_bytes + i * 144;\n                const uint8_t* blk1 = blk0 + K_bytes;\n                PF_BLK(blk0 + MVPF * K_bytes);\n                PF_BLK(blk1 + MVPF * K_bytes);\n                uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n                uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n                int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n                int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n                int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n                int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n                uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n                uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n                float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32))));\n                float32x4_t cmin = vmulq_f32(vtrn2q_f32(v, v), kMinMul);\n                int32x4_t acc0 = zero32, acc1 = zero32;\n                for (int c = 0; c < 4; ++c) {\n                    int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                    int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                    int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                    int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                    {\n                        const uint8_t* q = blk0 + 16 + 32 * c;\n                        uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                        int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                        ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                        int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                        uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                        if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                        else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                        else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                        else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                    }\n                    {\n                        const uint8_t* q = blk1 + 16 + 32 * c;\n                        uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                        int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                        ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                        int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                        uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                        if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                        else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                        else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                        else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                    }\n                }\n                int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n                fmin[pr] = vmlsq_f32(fmin[pr], vcvtq_f32_s32(mm), cmin);\n                facc[2 * pr]     = vfmaq_laneq_f32(facc[2 * pr],     vcvtq_f32_s32(acc0), v, 0);\n                facc[2 * pr + 1] = vfmaq_laneq_f32(facc[2 * pr + 1], vcvtq_f32_s32(acc1), v, 2);\n            }\n        }\n        float32x4_t mins = vpaddq_f32(fmin[0], fmin[1]);\n        float32x4_t sums = vpaddq_f32(vpaddq_f32(facc[0], facc[1]), vpaddq_f32(facc[2], facc[3]));\n        vst1q_f32(out + 4 * nq, vmulq_n_f32(vaddq_f32(sums, mins), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, float mscale, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, mscale, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, true, 1)\nTILE_ENTRY(rr1, 1, true, 1)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv4(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bsq;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bsq.resize((size_t)P * K_blk * 16);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        quantize_row(A, q8[0], bs0, &dav[0]);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv4(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    int maxabs = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, &dav[2 * pp + rr]);\n                    for (int j = 0; j < K_blk * 8; ++j) { int a = bsr[j] < 0 ? -bsr[j] : bsr[j]; if (a > maxabs) maxabs = a; }\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    int sh = 0;\n    while ((maxabs >> sh) > 127) ++sh;\n    const int rnd = sh ? (1 << (sh - 1)) : 0;\n    const float mscale = (float)(1 << sh);\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    int v = (bsr[j] + rnd) >> sh;\n                    if (v > 127) v = 127;\n                    if (v < -128) v = -128;\n                    bsq[so * 16 + rr * 8 + j] = (int8_t)v;\n                }\n            }\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq.data() + (size_t)p0 * K_blk * 16;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+   "content": "// v12: v8 + mv2 min-term fold: accumulate fmin with plain dmin lanes, apply the [1,128] hi weights once in the epilogue\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 8\n#endif\n#ifndef NB\n#define NB 64\n#endif\n#ifndef PFNP8\n#define PFNP8 1\n#endif\n#ifndef PFNP4\n#define PFNP4 1\n#endif\n#ifndef PFNP2\n#define PFNP2 1\n#endif\n#ifndef PFNP1\n#define PFNP1 1\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(pf0 + i * 144);\n            PF_BLK(pf1 + i * 144);\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4));\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vcvt_f32_f16(hv);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n            for (int c = 0; c < 4; ++c) {\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    if (SPLIT) accH[r] = (c == 0) ? vmulq_s32(uu, cO) : vmlaq_s32(accH[r], uu, cO);\n                    else       acc[r] = vmlaq_s32(acc[r], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mlo = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 32));\n                int32x4_t mhi = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 32 + 16));\n                int32x4_t mm  = vmlaq_n_s32(mlo, mhi, 128);\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f), fmin = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(blk0 + (size_t)MVPF * K_bytes);\n            PF_BLK(blk1 + (size_t)MVPF * K_bytes);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n            int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n            int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n            int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n            uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32))));\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n            int32x4_t acc0 = zero32, acc1 = zero32;\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                {\n                    const uint8_t* q = blk0 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                    else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                    else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                    else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                }\n                {\n                    const uint8_t* q = blk1 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                    else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                    else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                    else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                }\n            }\n            int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n            fmin = vmlsq_f32(fmin, vcvtq_f32_s32(mm), dminvec);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(acc0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(acc1), v, 2);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x4_t fmw = vmulq_f32(fmin, kMinMul);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        float32x2_t m2 = vpadd_f32(vget_low_f32(fmw), vget_high_f32(fmw));\n        vst1_f32(out + 2 * np, vmul_n_f32(vadd_f32(s2, m2), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, PFNP8)\nTILE_ENTRY(rr4, 4, false, PFNP4)\nTILE_ENTRY(rr2, 2, true, PFNP2)\nTILE_ENTRY(rr1, 1, true, PFNP1)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bsq;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bsq.resize((size_t)P * K_blk * 32);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        quantize_row(A, q8[0], bs0, &dav[0]);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv2(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    const int v  = bsr[j];\n                    const int lo = ((v + 64) & 127) - 64;\n                    const int hi = (v - lo) >> 7;\n                    bsq[so * 32 + rr * 8 + j]      = (int8_t)lo;\n                    bsq[so * 32 + 16 + rr * 8 + j] = (int8_t)hi;\n                }\n            }\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq.data() + (size_t)p0 * K_blk * 32;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
   }
  ],
  "provenance": {
-  "run": "e2e-fable-lane1",
-  "submitted_version": "v20.cpp",
-  "time_speedup": 3.012608906590939,
-  "evaluations": 20,
-  "server_calls": 42
+  "run": "e2e-fable2",
+  "submitted_version": "v12.cpp",
+  "time_speedup": 3.025973381483579,
+  "evaluations": 15,
+  "server_calls": 40
  }
 }

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q4_K_n8192_k2560.json

@@ -33,14 +33,14 @@
   },
   {
    "path": "kernel.cpp",
-   "content": "// Q4_K x Q8_K gemm, AArch64 i8mm (usmmla) 2x2-tile kernel for K=2560 (K_blk=10), N=8192.\n// FINAL (re-submission of v18): NB=32, MVPF=8, PFNP=2 for rr1 / 3 for rr2 / 1 for rr4+rr8.\n// usmmla 2x2 tiles, R=8/4/2/1 row-pair groups, single K pass, int8 bsums with one global pow2 shift\n// (single usmmla min term), buffered output epilogue, PLDL1STRM prefetch covering all 3 lines per block.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 8\n#endif\n#ifndef NB\n#define NB 32      // column pairs buffered before flushing to output\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vld1q_f32(src + j));\n        }\n    }\n}\n\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq, float mscale,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    const float32x4_t vms = {1.f, mscale, 1.f, mscale};\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(pf0 + i * 144);\n            PF_BLK(pf1 + i * 144);\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4));\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vmulq_f32(vcvt_f32_f16(hv), vms);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n            for (int c = 0; c < 4; ++c) {\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    if (SPLIT) accH[r] = (c == 0) ? vmulq_s32(uu, cO) : vmlaq_s32(accH[r], uu, cO);\n                    else       acc[r] = vmlaq_s32(acc[r], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mm = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 16));\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int nq = 0; nq < N / 4; ++nq) {\n        const uint8_t* bc0 = B + (size_t)(4 * nq) * K_bytes;\n        float32x4_t facc[4];\n        for (int j = 0; j < 4; ++j) facc[j] = vdupq_n_f32(0.f);\n        float32x4_t fmin[2] = {vdupq_n_f32(0.f), vdupq_n_f32(0.f)};\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            for (int pr = 0; pr < 2; ++pr) {\n                const uint8_t* blk0 = bc0 + (size_t)(2 * pr) * K_bytes + i * 144;\n                const uint8_t* blk1 = blk0 + K_bytes;\n                PF_BLK(blk0 + MVPF * K_bytes);\n                PF_BLK(blk1 + MVPF * K_bytes);\n                uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n                uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n                int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n                int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n                int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n                int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n                uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n                uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n                float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32))));\n                float32x4_t cmin = vmulq_f32(vtrn2q_f32(v, v), kMinMul);\n                int32x4_t acc0 = zero32, acc1 = zero32;\n                for (int c = 0; c < 4; ++c) {\n                    int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                    int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                    int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                    int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                    {\n                        const uint8_t* q = blk0 + 16 + 32 * c;\n                        uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                        int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                        ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                        int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                        uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                        if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                        else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                        else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                        else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                    }\n                    {\n                        const uint8_t* q = blk1 + 16 + 32 * c;\n                        uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                        int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                        ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                        int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                        uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                        if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                        else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                        else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                        else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                    }\n                }\n                int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n                fmin[pr] = vmlsq_f32(fmin[pr], vcvtq_f32_s32(mm), cmin);\n                facc[2 * pr]     = vfmaq_laneq_f32(facc[2 * pr],     vcvtq_f32_s32(acc0), v, 0);\n                facc[2 * pr + 1] = vfmaq_laneq_f32(facc[2 * pr + 1], vcvtq_f32_s32(acc1), v, 2);\n            }\n        }\n        float32x4_t mins = vpaddq_f32(fmin[0], fmin[1]);\n        float32x4_t sums = vpaddq_f32(vpaddq_f32(facc[0], facc[1]), vpaddq_f32(facc[2], facc[3]));\n        vst1q_f32(out + 4 * nq, vmulq_n_f32(vaddq_f32(sums, mins), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, float mscale, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, mscale, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, true, 3)\nTILE_ENTRY(rr1, 1, true, 2)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv4(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bsq;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bsq.resize((size_t)P * K_blk * 16);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        quantize_row(A, q8[0], bs0, &dav[0]);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv4(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    int maxabs = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, &dav[2 * pp + rr]);\n                    for (int j = 0; j < K_blk * 8; ++j) { int a = bsr[j] < 0 ? -bsr[j] : bsr[j]; if (a > maxabs) maxabs = a; }\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    int sh = 0;\n    while ((maxabs >> sh) > 127) ++sh;\n    const int rnd = sh ? (1 << (sh - 1)) : 0;\n    const float mscale = (float)(1 << sh);\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    int v = (bsr[j] + rnd) >> sh;\n                    if (v > 127) v = 127;\n                    if (v < -128) v = -128;\n                    bsq[so * 16 + rr * 8 + j] = (int8_t)v;\n                }\n            }\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq.data() + (size_t)p0 * K_blk * 16;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+   "content": "// variant: NCH2=1 NCH1=2\n#define NCH2 1\n#define NCH1 2\n// Q4_K x Q8_K gemm for N=8192, K=2560 (K_blk=10), AArch64 i8mm (usmmla) 2x2-tile kernel.\n// Per-256-block activation scales (ggml Q8_K semantics) + exact lo/hi block sums; usmmla 2x2 tiles\n// (R=8/4/2/1 row pairs per column-pair pass), group activation layout [i][c][r][128], BIT-based scale\n// decode, TBL2 per-chunk coefficients, buffered output epilogue (NB column pairs, STNP flush),\n// dedicated M==1 USDOT path mv2, SW prefetch of the next column pair's B blocks (3 lines/block).\n// Session 2: NCH independent MLA chains per row pair for small R (asm-laundered so clang cannot\n// re-associate them), constant vectors reloaded through a laundered pointer for small R.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 8\n#endif\n#ifndef NB\n#define NB 64\n#endif\n#ifndef PFNP8\n#define PFNP8 1\n#endif\n#ifndef PFNP4\n#define PFNP4 1\n#endif\n#ifndef PFNP2\n#define PFNP2 3\n#endif\n#ifndef PFNP1\n#define PFNP1 3\n#endif\n#ifndef NCH8\n#define NCH8 1\n#endif\n#ifndef NCH4\n#define NCH4 1\n#endif\n#ifndef NCH2\n#define NCH2 2\n#endif\n#ifndef NCH1\n#define NCH1 4\n#endif\n#ifndef LAUND8\n#define LAUND8 0\n#endif\n#ifndef LAUND4\n#define LAUND4 0\n#endif\n#ifndef LAUND2\n#define LAUND2 1\n#endif\n#ifndef LAUND1\n#define LAUND1 1\n#endif\n#ifndef STNPQ\n#define STNPQ 0\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int i = 0; i < K_blk; ++i) {\n        const uint16_t* xb = x + i * 256;\n        float32x4_t vmax = vdupq_n_f32(0.f);\n        for (int l = 0; l < 256; l += 8) {\n            uint16x8_t h = vld1q_u16(xb + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n        }\n        const float amax = vmaxvq_f32(vmax);\n        int8_t* qb = q8 + i * 256;\n        int16_t* bsb = bs + i * 8;\n        if (amax == 0.f) {\n            memset(qb, 0, 256);\n            for (int j = 0; j < 8; ++j) bsb[j] = 0;\n            da[i] = 0.f;\n            continue;\n        }\n        float maxv = 0.f;\n        for (int l = 0; l < 256; ++l) {\n            uint32_t b = (uint32_t)xb[l] << 16; float f; memcpy(&f, &b, 4);\n            if (fabsf(f) == amax) { maxv = f; break; }\n        }\n        const float iscale = -127.f / maxv;\n        const float32x4_t vis = vdupq_n_f32(iscale);\n        for (int j = 0; j < 8; ++j) {\n            int32x4_t s = vdupq_n_s32(0);\n            int8_t* dst = qb + j * 32;\n            const uint16_t* src = xb + j * 32;\n            for (int l = 0; l < 32; l += 8) {\n                uint16x8_t h = vld1q_u16(src + l);\n                float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n                float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n                int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n                int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n                s = vaddq_s32(s, vaddq_s32(i0, i1));\n                int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n                vst1_s8(dst + l, vqmovn_s16(n16));\n            }\n            bsb[j] = (int16_t)vaddvq_s32(s);\n        }\n        da[i] = 1.0f / iscale;\n    }\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\n// decode constants: [0]=idxA [1]=idxB [2]=shA (as u8) [3]=bitM\nalignas(64) static const uint8x16_t kDec[4] = {\n    {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11},\n    {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7},\n    {0,0,0,0, 0,0,0,0, 0,0,0,0, 0xFC,0xFC,0xFC,0xFC},\n    {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0}};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nalignas(64) static const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\n\nKFN uint8x16_t decode_scales(uint8x16_t q, const uint8x16_t* dc) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, dc[0]), vreinterpretq_s8_u8(dc[2]));\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, dc[1]), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(dc[3]));\n    return A;\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n#if STNPQ\n            for (int j = 0; j < 2 * NB; j += 8) {\n                float32x4_t v0 = vld1q_f32(src + j);\n                float32x4_t v1 = vld1q_f32(src + j + 4);\n                __asm__ volatile(\"stnp %q0, %q1, [%2]\" : : \"w\"(v0), \"w\"(v1), \"r\"(dst + j) : \"memory\");\n            }\n#else\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n#endif\n        }\n    }\n}\n\n// gp: packed activations [block][chunk][rowpair][128B]; bsq: 32B per (rowpair, block) = [lo r0|lo r1|hi r0|hi r1];\n// dab: 16B per (rowpair, block) = [da_r0, da_r1, da_r0, da_r1].\ntemplate <int R, int NCH, int PFNP, bool LAUND>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq, const float* dab,\n                  const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const int32x4_t v128 = vdupq_n_s32(128);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8x16_t* cofp = kCoef;\n            const uint8x16_t* dcp = kDec;\n            if (LAUND) { __asm__(\"\" : \"+r\"(cofp)); __asm__(\"\" : \"+r\"(dcp)); }\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(pf0 + i * 144);\n            PF_BLK(pf1 + i * 144);\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4), dcp);\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4), dcp);\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vcvt_f32_f16(hv);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t ch[R][NCH];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n            for (int c = 0; c < 4; ++c) {\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, cofp[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, cofp[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                const int kl = (2 * c) % NCH;\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    ch[r][kl] = (2 * c < NCH) ? vmulq_s32(uu, cE) : vmlaq_s32(ch[r][kl], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                const int kh = (2 * c + 1) % NCH;\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    ch[r][kh] = (2 * c + 1 < NCH) ? vmulq_s32(uu, cO) : vmlaq_s32(ch[r][kh], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                const int8_t* bp = bsq + so * 32;\n                int32x4_t mlo = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bp));\n                int32x4_t mhi = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bp + 16));\n                int32x4_t mm = vmlaq_s32(mlo, mhi, v128);\n                int32x4_t a = ch[r][0];\n                for (int k = 1; k < NCH; ++k) {\n                    int32x4_t t = ch[r][k];\n                    __asm__(\"\" : \"+w\"(t));\n                    a = vaddq_s32(a, t);\n                }\n                float32x4_t t = vmulq_f32(vcvtq_f32_s32(a), dvec);\n                t = vmlsq_f32(t, vcvtq_f32_s32(mm), dminvec);\n                facc[r] = vfmaq_f32(facc[r], t, vld1q_f32(dab + so * 4));\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, vget_low_f32(vuzp1q_f32(f, f)));\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, vget_low_f32(vuzp2q_f32(f, f)));\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv2(const int8_t* q8, const int8_t* bsc, const float* da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f), fmin = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(blk0 + MVPF * K_bytes);\n            PF_BLK(blk1 + MVPF * K_bytes);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4), kDec);\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4), kDec);\n            int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n            int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n            int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n            int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n            uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float32x4_t v = vmulq_n_f32(vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)))), da[i]);\n            float32x4_t cmin = vmulq_f32(vtrn2q_f32(v, v), kMinMul);\n            int32x4_t acc0 = zero32, acc1 = zero32;\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                {\n                    const uint8_t* q = blk0 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                    else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                    else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                    else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                }\n                {\n                    const uint8_t* q = blk1 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                    else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                    else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                    else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                }\n            }\n            int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n            fmin = vmlsq_f32(fmin, vcvtq_f32_s32(mm), cmin);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(acc0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(acc1), v, 2);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        float32x2_t m2 = vpadd_f32(vget_low_f32(fmin), vget_high_f32(fmin));\n        vst1_f32(out + 2 * np, vadd_f32(s2, m2));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, NCH, PFNP, LAUND) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, \\\n    const float* dab, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, NCH, PFNP, LAUND>(gp, bsq, dab, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, NCH8, PFNP8, LAUND8)\nTILE_ENTRY(rr4, 4, NCH4, PFNP4, LAUND4)\nTILE_ENTRY(rr2, 2, NCH2, PFNP2, LAUND2)\nTILE_ENTRY(rr1, 1, NCH1, PFNP1, LAUND1)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8, const int8_t* bsc,\n    const float* da, const uint8_t* B, float* out) { run_mv2(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack_v, bsq_v;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav, dab;\n    if ((int)apack_v.size() < P * K_blk * 512 + 64) {\n        apack_v.resize((size_t)P * K_blk * 512 + 64);\n        bsq_v.resize((size_t)P * K_blk * 32 + 64);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2 * K_blk);\n        dab.resize((size_t)P * K_blk * 4);\n    }\n    int8_t* apack = (int8_t*)(((uintptr_t)apack_v.data() + 63) & ~(uintptr_t)63);\n    int8_t* bsq = (int8_t*)(((uintptr_t)bsq_v.data() + 63) & ~(uintptr_t)63);\n    alignas(64) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        float da0[K_blk];\n        quantize_row(A, q8[0], bs0, da0);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv2(q8[0], bsc, da0, B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                float* dar = dav.data() + (size_t)m * K_blk;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, dar);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    for (int i = 0; i < K_blk; ++i) dar[i] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    const int v = bsr[j];\n                    const int lo = ((v + 64) & 127) - 64;\n                    const int hi = (v - lo) >> 7;\n                    bsq[so * 32 + rr * 8 + j] = (int8_t)lo;\n                    bsq[so * 32 + 16 + rr * 8 + j] = (int8_t)hi;\n                }\n            }\n            const float d0 = dav[(size_t)(2 * pp) * K_blk + i];\n            const float d1 = dav[(size_t)(2 * pp + 1) * K_blk + i];\n            dab[so * 4 + 0] = d0; dab[so * 4 + 1] = d1; dab[so * 4 + 2] = d0; dab[so * 4 + 3] = d1;\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq + (size_t)p0 * K_blk * 32;\n                const float* db = dab.data() + (size_t)p0 * K_blk * 4;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
   }
  ],
  "provenance": {
-  "run": "e2e-fable-lane1",
-  "submitted_version": "v19.cpp",
-  "time_speedup": 2.9867929263356645,
-  "evaluations": 19,
+  "run": "e2e-fable2",
+  "submitted_version": "v7.cpp",
+  "time_speedup": 2.927434264579252,
+  "evaluations": 16,
   "server_calls": 40
  }
 }

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q4_K_n9216_k2560.json

@@ -33,14 +33,14 @@
   },
   {
    "path": "kernel.cpp",
-   "content": "// v19: FINAL re-submit of the v11 code (NB=64, STNP flush, mv2 with MVPF=8, PFNP rr8/rr4=1, rr2=3, rr1=3, KS*=10)\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 8\n#endif\n#ifndef NB\n#define NB 64      // column pairs buffered before flushing to output\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq, float mscale,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    const float32x4_t vms = {1.f, mscale, 1.f, mscale};\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(pf0 + i * 144);\n            PF_BLK(pf1 + i * 144);\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4));\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vmulq_f32(vcvt_f32_f16(hv), vms);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n            for (int c = 0; c < 4; ++c) {\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    if (SPLIT) accH[r] = (c == 0) ? vmulq_s32(uu, cO) : vmlaq_s32(accH[r], uu, cO);\n                    else       acc[r] = vmlaq_s32(acc[r], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mm = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 16));\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv2(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f), fmin = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(blk0 + MVPF * K_bytes);\n            PF_BLK(blk1 + MVPF * K_bytes);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n            int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n            int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n            int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n            uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32))));\n            float32x4_t cmin = vmulq_f32(vtrn2q_f32(v, v), kMinMul);\n            int32x4_t acc0 = zero32, acc1 = zero32;\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                {\n                    const uint8_t* q = blk0 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                    else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                    else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                    else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                }\n                {\n                    const uint8_t* q = blk1 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                    else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                    else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                    else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                }\n            }\n            int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n            fmin = vmlsq_f32(fmin, vcvtq_f32_s32(mm), cmin);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(acc0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(acc1), v, 2);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        float32x2_t m2 = vpadd_f32(vget_low_f32(fmin), vget_high_f32(fmin));\n        vst1_f32(out + 2 * np, vmul_n_f32(vadd_f32(s2, m2), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, float mscale, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, mscale, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, true, 3)\nTILE_ENTRY(rr1, 1, true, 3)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv2(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bsq;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bsq.resize((size_t)P * K_blk * 16);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        quantize_row(A, q8[0], bs0, &dav[0]);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv2(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    int maxabs = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, &dav[2 * pp + rr]);\n                    for (int j = 0; j < K_blk * 8; ++j) { int a = bsr[j] < 0 ? -bsr[j] : bsr[j]; if (a > maxabs) maxabs = a; }\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    int sh = 0;\n    while ((maxabs >> sh) > 127) ++sh;\n    const int rnd = sh ? (1 << (sh - 1)) : 0;\n    const float mscale = (float)(1 << sh);\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    int v = (bsr[j] + rnd) >> sh;\n                    if (v > 127) v = 127;\n                    if (v < -128) v = -128;\n                    bsq[so * 16 + rr * 8 + j] = (int8_t)v;\n                }\n            }\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq.data() + (size_t)p0 * K_blk * 16;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+   "content": "// v3: numerically faithful batched path \u2014 per-256-block activation scales (ggml Q8_K semantics)\n//     + exact lo/hi block sums (2 usmmla + mla) in the tiles; per-(rowpair,block) da vector folded in the tail.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 8\n#endif\n#ifndef NB\n#define NB 64\n#endif\n\nnamespace {\n\n// ggml quantize_row_q8_K semantics: one scale per 256-element block, q in [-127,127],\n// per-32 sums (bs, 8 per block), da[i] = 1/iscale.\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int i = 0; i < K_blk; ++i) {\n        const uint16_t* xb = x + i * 256;\n        float32x4_t vmax = vdupq_n_f32(0.f);\n        for (int l = 0; l < 256; l += 8) {\n            uint16x8_t h = vld1q_u16(xb + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n        }\n        const float amax = vmaxvq_f32(vmax);\n        int8_t* qb = q8 + i * 256;\n        int16_t* bsb = bs + i * 8;\n        if (amax == 0.f) {\n            memset(qb, 0, 256);\n            for (int j = 0; j < 8; ++j) bsb[j] = 0;\n            da[i] = 0.f;\n            continue;\n        }\n        float maxv = 0.f;\n        for (int l = 0; l < 256; ++l) {\n            uint32_t b = (uint32_t)xb[l] << 16; float f; memcpy(&f, &b, 4);\n            if (fabsf(f) == amax) { maxv = f; break; }\n        }\n        const float iscale = -127.f / maxv;\n        const float32x4_t vis = vdupq_n_f32(iscale);\n        for (int j = 0; j < 8; ++j) {\n            int32x4_t s = vdupq_n_s32(0);\n            int8_t* dst = qb + j * 32;\n            const uint16_t* src = xb + j * 32;\n            for (int l = 0; l < 32; l += 8) {\n                uint16x8_t h = vld1q_u16(src + l);\n                float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n                float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n                int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n                int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n                s = vaddq_s32(s, vaddq_s32(i0, i1));\n                int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n                vst1_s8(dst + l, vqmovn_s16(n16));\n            }\n            bsb[j] = (int16_t)vaddvq_s32(s);\n        }\n        da[i] = 1.0f / iscale;\n    }\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 16+(j),255,255,255, 16+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\n// gp: packed activations [block][chunk][rowpair][128B]; bsq: 32B per (rowpair, block) = [lo r0|lo r1|hi r0|hi r1];\n// dab: 16B per (rowpair, block) = [da_r0, da_r1, da_r0, da_r1].\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq, const float* dab,\n                  const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const int32x4_t v128 = vdupq_n_s32(128);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(pf0 + i * 144);\n            PF_BLK(pf1 + i * 144);\n            uint8x16x2_t dec;\n            dec.val[0] = decode_scales(vld1q_u8(blk0 + 4));\n            dec.val[1] = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec.val[0]), vreinterpretq_u64_u8(dec.val[1])));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vcvt_f32_f16(hv);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 16;\n            const uint8_t* q1 = blk1 + 16;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n            for (int c = 0; c < 4; ++c) {\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl2q_u8(dec, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = vandq_u8(z0, m4), l1 = vandq_u8(z1, m4);\n                uint8x16_t l2 = vandq_u8(z2, m4), l3 = vandq_u8(z3, m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                }\n                uint8x16_t h0 = vshrq_n_u8(z0, 4), h1 = vshrq_n_u8(z1, 4);\n                uint8x16_t h2 = vshrq_n_u8(z2, 4), h3 = vshrq_n_u8(z3, 4);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128 + 64;\n                    int32x4_t uu = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, h1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, h2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, h3, vld1q_s8(ap + 48));\n                    if (SPLIT) accH[r] = (c == 0) ? vmulq_s32(uu, cO) : vmlaq_s32(accH[r], uu, cO);\n                    else       acc[r] = vmlaq_s32(acc[r], uu, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                const int8_t* bp = bsq + so * 32;\n                int32x4_t mlo = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bp));\n                int32x4_t mhi = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bp + 16));\n                int32x4_t mm = vmlaq_s32(mlo, mhi, v128);\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                float32x4_t t = vmulq_f32(vcvtq_f32_s32(a), dvec);\n                t = vmlsq_f32(t, vcvtq_f32_s32(mm), dminvec);\n                facc[r] = vfmaq_f32(facc[r], t, vld1q_f32(dab + so * 4));\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, vget_low_f32(vuzp1q_f32(f, f)));\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, vget_low_f32(vuzp2q_f32(f, f)));\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv2(const int8_t* q8, const int8_t* bsc, const float* da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f), fmin = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            const uint8_t* blk0 = b0 + i * 144;\n            const uint8_t* blk1 = b1 + i * 144;\n            PF_BLK(blk0 + MVPF * K_bytes);\n            PF_BLK(blk1 + MVPF * K_bytes);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n            int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n            int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n            int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n            uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float32x4_t v = vmulq_n_f32(vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)))), da[i]);\n            float32x4_t cmin = vmulq_f32(vtrn2q_f32(v, v), kMinMul);\n            int32x4_t acc0 = zero32, acc1 = zero32;\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                {\n                    const uint8_t* q = blk0 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                    else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                    else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                    else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                }\n                {\n                    const uint8_t* q = blk1 + 16 + 32 * c;\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, vandq_u8(a0, m4), y0);\n                    ul = vusdotq_s32(ul, vandq_u8(a1, m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, vshrq_n_u8(a0, 4), y2);\n                    uh = vusdotq_s32(uh, vshrq_n_u8(a1, 4), y3);\n                    if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                    else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                    else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                    else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                }\n            }\n            int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n            fmin = vmlsq_f32(fmin, vcvtq_f32_s32(mm), cmin);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(acc0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(acc1), v, 2);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        float32x2_t m2 = vpadd_f32(vget_low_f32(fmin), vget_high_f32(fmin));\n        vst1_f32(out + 2 * np, vadd_f32(s2, m2));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, \\\n    const float* dab, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, dab, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, true, 3)\nTILE_ENTRY(rr1, 1, true, 3)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8, const int8_t* bsc,\n    const float* da, const uint8_t* B, float* out) { run_mv2(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bsq;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav, dab;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bsq.resize((size_t)P * K_blk * 32);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2 * K_blk);\n        dab.resize((size_t)P * K_blk * 4);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        float da0[K_blk];\n        quantize_row(A, q8[0], bs0, da0);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv2(q8[0], bsc, da0, B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                float* dar = dav.data() + (size_t)m * K_blk;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, dar);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    for (int i = 0; i < K_blk; ++i) dar[i] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    const int v = bsr[j];\n                    const int lo = ((v + 64) & 127) - 64;\n                    const int hi = (v - lo) >> 7;\n                    bsq[so * 32 + rr * 8 + j] = (int8_t)lo;\n                    bsq[so * 32 + 16 + rr * 8 + j] = (int8_t)hi;\n                }\n            }\n            const float d0 = dav[(size_t)(2 * pp) * K_blk + i];\n            const float d1 = dav[(size_t)(2 * pp + 1) * K_blk + i];\n            dab[so * 4 + 0] = d0; dab[so * 4 + 1] = d1; dab[so * 4 + 2] = d0; dab[so * 4 + 3] = d1;\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq.data() + (size_t)p0 * K_blk * 32;\n                const float* db = dab.data() + (size_t)p0 * K_blk * 4;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
   }
  ],
  "provenance": {
-  "run": "e2e-fable-lane1",
-  "submitted_version": "v19.cpp",
-  "time_speedup": 2.9957606306753926,
-  "evaluations": 20,
-  "server_calls": 40
+  "run": "e2e-fable2",
+  "submitted_version": "v3.cpp",
+  "time_speedup": 2.966901769113881,
+  "evaluations": 15,
+  "server_calls": 35
  }
 }

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q5_K_n2560_k4096.json

@@ -3,6 +3,7 @@
  "definition": "gemm_ggml_q5_K_n2560_k4096",
  "dataset": "llama.cpp",
  "author": "claude-code-claude-fable-5-1-gatev2",
+ "description": "Fable 5.1 re-optimization of gemm_ggml_q5_K_n2560_k4096 under gate v2 (real activations, realistic k-quant weights, baseline-relative SQNR floor), budget 33/42, 2026-09-22.",
  "spec": {
   "language": "cpp",
   "target_hardware": [
@@ -35,5 +36,11 @@
    "content": "// Q5_K x Q8 gemm, AArch64 i8mm (usmmla) 2x2-tile kernel for K=4096 (K_blk=16), N=2560.\n// v10: v9 + two rows per asm block (interleaved independent usmmla chains) for even R.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n#define BLK 176\n\n#ifndef KS8\n#define KS8 8\n#endif\n#ifndef KS4\n#define KS4 16\n#endif\n#ifndef KS2\n#define KS2 16\n#endif\n#ifndef KS1\n#define KS1 16\n#endif\n#ifndef MVPF\n#define MVPF 6\n#endif\n#ifndef NB\n#define NB 32\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 8+(j),255,255,255, 8+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\nstatic const uint8x16_t kHT[4] = {\n    {0,16,0,16,0,16,0,16,0,16,0,16,0,16,0,16},\n    {0,0,16,16,0,0,16,16,0,0,16,16,0,0,16,16},\n    {0,0,0,0,16,16,16,16,0,0,0,0,16,16,16,16},\n    {0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16}};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\nKFN uint8x16_t hb(uint8x16_t idx, uint8x16_t T) { return vqtbl1q_u8(T, idx); }\nKFN uint8x16_t ins_lo(uint8x16_t z, uint8x16_t s, uint8x16_t m0F) {\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(s) : \"w\"(z), \"w\"(m0F));\n    return s;\n}\nKFN uint8x16_t ins_hi(uint8x16_t z, uint8x16_t s) {\n    return vsriq_n_u8(s, z, 4);\n}\n\nstruct ARow { int8_t b[64]; };\nstruct ARow2 { int8_t b[192]; };\ntemplate <bool FIRST>\nKFN void mmla_row(int32x4_t& acc, uint8x16_t l0, uint8x16_t l1, uint8x16_t l2, uint8x16_t l3,\n                  int32x4_t c, const int8_t* ap) {\n    uint8x16_t a0, a1, a2, a3; int32x4_t u;\n    if (FIRST) {\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"ldp %q[a2], %q[a3], [%[ap], #32]\\n\\t\"\n                \"movi %[u].2d, #0\\n\\t\"\n                \"usmmla %[u].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l2].16b, %[a2].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l3].16b, %[a3].16b\\n\\t\"\n                \"mul %[acc].4s, %[u].4s, %[c].4s\"\n                : [acc] \"=w\"(acc), [a0] \"=&w\"(a0), [a1] \"=&w\"(a1), [a2] \"=&w\"(a2), [a3] \"=&w\"(a3), [u] \"=&w\"(u)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow*)ap));\n    } else {\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"ldp %q[a2], %q[a3], [%[ap], #32]\\n\\t\"\n                \"movi %[u].2d, #0\\n\\t\"\n                \"usmmla %[u].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l2].16b, %[a2].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l3].16b, %[a3].16b\\n\\t\"\n                \"mla %[acc].4s, %[u].4s, %[c].4s\"\n                : [acc] \"+w\"(acc), [a0] \"=&w\"(a0), [a1] \"=&w\"(a1), [a2] \"=&w\"(a2), [a3] \"=&w\"(a3), [u] \"=&w\"(u)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow*)ap));\n    }\n}\n// Two row pairs (ap and ap+128) with interleaved independent chains.\ntemplate <bool FIRST>\nKFN void mmla_row2(int32x4_t& acc0, int32x4_t& acc1, uint8x16_t l0, uint8x16_t l1, uint8x16_t l2, uint8x16_t l3,\n                   int32x4_t c, const int8_t* ap) {\n    uint8x16_t a0, a1, a2, a3, b0, b1, b2, b3; int32x4_t u, v;\n    if (FIRST) {\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"ldp %q[b0], %q[b1], [%[ap], #128]\\n\\t\"\n                \"ldp %q[a2], %q[a3], [%[ap], #32]\\n\\t\"\n                \"ldp %q[b2], %q[b3], [%[ap], #160]\\n\\t\"\n                \"movi %[u].2d, #0\\n\\t\"\n                \"movi %[v].2d, #0\\n\\t\"\n                \"usmmla %[u].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l0].16b, %[b0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l1].16b, %[b1].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l2].16b, %[a2].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l2].16b, %[b2].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l3].16b, %[a3].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l3].16b, %[b3].16b\\n\\t\"\n                \"mul %[acc0].4s, %[u].4s, %[c].4s\\n\\t\"\n                \"mul %[acc1].4s, %[v].4s, %[c].4s\"\n                : [acc0] \"=w\"(acc0), [acc1] \"=w\"(acc1),\n                  [a0] \"=&w\"(a0), [a1] \"=&w\"(a1), [a2] \"=&w\"(a2), [a3] \"=&w\"(a3),\n                  [b0] \"=&w\"(b0), [b1] \"=&w\"(b1), [b2] \"=&w\"(b2), [b3] \"=&w\"(b3), [u] \"=&w\"(u), [v] \"=&w\"(v)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow2*)ap));\n    } else {\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"ldp %q[b0], %q[b1], [%[ap], #128]\\n\\t\"\n                \"ldp %q[a2], %q[a3], [%[ap], #32]\\n\\t\"\n                \"ldp %q[b2], %q[b3], [%[ap], #160]\\n\\t\"\n                \"movi %[u].2d, #0\\n\\t\"\n                \"movi %[v].2d, #0\\n\\t\"\n                \"usmmla %[u].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l0].16b, %[b0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l1].16b, %[b1].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l2].16b, %[a2].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l2].16b, %[b2].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l3].16b, %[a3].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l3].16b, %[b3].16b\\n\\t\"\n                \"mla %[acc0].4s, %[u].4s, %[c].4s\\n\\t\"\n                \"mla %[acc1].4s, %[v].4s, %[c].4s\"\n                : [acc0] \"+w\"(acc0), [acc1] \"+w\"(acc1),\n                  [a0] \"=&w\"(a0), [a1] \"=&w\"(a1), [a2] \"=&w\"(a2), [a3] \"=&w\"(a3),\n                  [b0] \"=&w\"(b0), [b1] \"=&w\"(b1), [b2] \"=&w\"(b2), [b3] \"=&w\"(b3), [u] \"=&w\"(u), [v] \"=&w\"(v)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow2*)ap));\n    }\n}\n\ntemplate <int R, bool FIRST>\nKFN void mmla_rows(int32x4_t* acc, uint8x16_t l0, uint8x16_t l1, uint8x16_t l2, uint8x16_t l3,\n                   int32x4_t c, const int8_t* apr, int off) {\n    if (R == 1) {\n        mmla_row<FIRST>(acc[0], l0, l1, l2, l3, c, apr + off);\n    } else {\n        for (int r = 0; r < R; r += 2)\n            mmla_row2<FIRST>(acc[r], acc[r + 1], l0, l1, l2, l3, c, apr + r * 128 + off);\n    }\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n#define BARRIER() __asm__ volatile(\"\" ::: \"memory\")\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PF_BLK(pf0 + i * BLK);\n            PF_BLK(pf1 + i * BLK);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t scz   = vreinterpretq_u8_u64(vzip1q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vcvt_f32_f16(hv);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            uint64x2_t h0a = vreinterpretq_u64_u8(vld1q_u8(blk0 + 16));\n            uint64x2_t h0b = vreinterpretq_u64_u8(vld1q_u8(blk0 + 32));\n            uint64x2_t h1a = vreinterpretq_u64_u8(vld1q_u8(blk1 + 16));\n            uint64x2_t h1b = vreinterpretq_u64_u8(vld1q_u8(blk1 + 32));\n            uint8x16_t zh[4];\n            zh[0] = vreinterpretq_u8_u64(vzip1q_u64(h0a, h1a));\n            zh[1] = vreinterpretq_u8_u64(vzip2q_u64(h0a, h1a));\n            zh[2] = vreinterpretq_u8_u64(vzip1q_u64(h0b, h1b));\n            zh[3] = vreinterpretq_u8_u64(vzip2q_u64(h0b, h1b));\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 48;\n            const uint8_t* q1 = blk1 + 48;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n#pragma clang loop unroll(full)\n            for (int c = 0; c < 4; ++c) {\n                BARRIER();\n                uint8x16_t idx[4];\n                if (c == 0) { for (int t = 0; t < 4; ++t) idx[t] = vandq_u8(zh[t], m4); }\n                else if (c == 2) { for (int t = 0; t < 4; ++t) idx[t] = vshrq_n_u8(zh[t], 4); }\n                else { for (int t = 0; t < 4; ++t) idx[t] = (c == 1) ? vandq_u8(zh[t], m4) : vshrq_n_u8(zh[t], 4); }\n                const uint8x16_t Tlo = kHT[(2 * c) & 3];\n                const uint8x16_t Thi = kHT[(2 * c + 1) & 3];\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl1q_u8(scz, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl1q_u8(scz, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = ins_lo(z0, hb(idx[0], Tlo), m4);\n                uint8x16_t l1 = ins_lo(z1, hb(idx[1], Tlo), m4);\n                uint8x16_t l2 = ins_lo(z2, hb(idx[2], Tlo), m4);\n                uint8x16_t l3 = ins_lo(z3, hb(idx[3], Tlo), m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                if (c == 0) mmla_rows<R, true >(acc, l0, l1, l2, l3, cE, apr, 0);\n                else        mmla_rows<R, false>(acc, l0, l1, l2, l3, cE, apr, 0);\n                uint8x16_t h0 = ins_hi(z0, hb(idx[0], Thi));\n                uint8x16_t h1 = ins_hi(z1, hb(idx[1], Thi));\n                uint8x16_t h2 = ins_hi(z2, hb(idx[2], Thi));\n                uint8x16_t h3 = ins_hi(z3, hb(idx[3], Thi));\n                if (SPLIT) {\n                    if (c == 0) mmla_rows<R, true >(accH, h0, h1, h2, h3, cO, apr, 64);\n                    else        mmla_rows<R, false>(accH, h0, h1, h2, h3, cO, apr, 64);\n                } else {\n                    mmla_rows<R, false>(acc, h0, h1, h2, h3, cO, apr, 64);\n                }\n            }\n            BARRIER();\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mlo = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 32));\n                int32x4_t mhi = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 32 + 16));\n                int32x4_t mm  = vmlaq_n_s32(mlo, mhi, 128);\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv2(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f), fmin = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PF_BLK(blk0 + MVPF * K_bytes);\n            PF_BLK(blk1 + MVPF * K_bytes);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n            int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n            int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n            int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n            uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32))));\n            float32x4_t cmin = vtrn2q_f32(v, v);\n            uint8x16_t qh0a = vld1q_u8(blk0 + 16), qh0b = vld1q_u8(blk0 + 32);\n            uint8x16_t qh1a = vld1q_u8(blk1 + 16), qh1b = vld1q_u8(blk1 + 32);\n            int32x4_t acc0 = zero32, acc1 = zero32;\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                const uint8x16_t Tlo = kHT[(2 * c) & 3];\n                const uint8x16_t Thi = kHT[(2 * c + 1) & 3];\n                {\n                    const uint8_t* q = blk0 + 48 + 32 * c;\n                    uint8x16_t i0 = (c < 2) ? vandq_u8(qh0a, m4) : vshrq_n_u8(qh0a, 4);\n                    uint8x16_t i1 = (c < 2) ? vandq_u8(qh0b, m4) : vshrq_n_u8(qh0b, 4);\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, ins_lo(a0, hb(i0,Tlo), m4), y0);\n                    ul = vusdotq_s32(ul, ins_lo(a1, hb(i1,Tlo), m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, ins_hi(a0, hb(i0,Thi)), y2);\n                    uh = vusdotq_s32(uh, ins_hi(a1, hb(i1,Thi)), y3);\n                    if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                    else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                    else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                    else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                }\n                {\n                    const uint8_t* q = blk1 + 48 + 32 * c;\n                    uint8x16_t i0 = (c < 2) ? vandq_u8(qh1a, m4) : vshrq_n_u8(qh1a, 4);\n                    uint8x16_t i1 = (c < 2) ? vandq_u8(qh1b, m4) : vshrq_n_u8(qh1b, 4);\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, ins_lo(a0, hb(i0,Tlo), m4), y0);\n                    ul = vusdotq_s32(ul, ins_lo(a1, hb(i1,Tlo), m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, ins_hi(a0, hb(i0,Thi)), y2);\n                    uh = vusdotq_s32(uh, ins_hi(a1, hb(i1,Thi)), y3);\n                    if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                    else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                    else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                    else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                }\n            }\n            int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n            fmin = vmlsq_f32(fmin, vcvtq_f32_s32(mm), cmin);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(acc0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(acc1), v, 2);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        float32x4_t fm = vmulq_f32(fmin, kMinMul);\n        float32x2_t m2 = vpadd_f32(vget_low_f32(fm), vget_high_f32(fm));\n        vst1_f32(out + 2 * np, vmul_n_f32(vadd_f32(s2, m2), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, true, 2)\nTILE_ENTRY(rr1, 1, true, 2)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv2(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bsq;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bsq.resize((size_t)P * K_blk * 32);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        quantize_row(A, q8[0], bs0, &dav[0]);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv2(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    const int v  = bsr[j];\n                    const int lo = ((v + 64) & 127) - 64;\n                    const int hi = (v - lo) >> 7;\n                    bsq[so * 32 + rr * 8 + j]      = (int8_t)lo;\n                    bsq[so * 32 + 16 + rr * 8 + j] = (int8_t)hi;\n                }\n            }\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq.data() + (size_t)p0 * K_blk * 32;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
   }
  ],
- "description": "Fable 5.1 re-optimization of gemm_ggml_q5_K_n2560_k4096 under gate v2 (real activations, realistic k-quant weights, baseline-relative SQNR floor), budget 33/42, 2026-09-22."
+ "provenance": {
+  "run": "e2e-fable2",
+  "submitted_version": "v10.cpp",
+  "time_speedup": 3.600647529426703,
+  "evaluations": 13,
+  "server_calls": 38
+ }
 }

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q5_K_n8192_k2560.json

@@ -33,14 +33,14 @@
   },
   {
    "path": "kernel.cpp",
-   "content": "// Q5_K x Q8_K gemm, AArch64 i8mm (usmmla) 2x2-tile kernel for K=2560 (K_blk=10), N=8192.\n// v16: v14 with MVPF=10.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n#define BLK 176\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 10\n#endif\n#ifndef NB\n#define NB 32      // column pairs buffered before flushing to output\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n    }\n    const float amax = vmaxvq_f32(vmax);\n    if (amax == 0.f) {\n        memset(q8, 0, K);\n        for (int j = 0; j < K_blk * 8; ++j) bs[j] = 0;\n        *da = 0.f;\n        return;\n    }\n    float maxv = 0.f;\n    for (int l = 0; l < K; ++l) {\n        uint32_t b = (uint32_t)x[l] << 16; float f; memcpy(&f, &b, 4);\n        if (fabsf(f) == amax) { maxv = f; break; }\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int j = 0; j < K / 32; ++j) {\n        int32x4_t s = vdupq_n_s32(0);\n        int8_t* dst = q8 + j * 32;\n        for (int l = 0; l < 32; l += 8) {\n            uint16x8_t h = vld1q_u16(x + j * 32 + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n            int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n            s = vaddq_s32(s, vaddq_s32(i0, i1));\n            int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n            vst1_s8(dst + l, vqmovn_s16(n16));\n        }\n        bs[j] = (int16_t)vaddvq_s32(s);\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 8+(j),255,255,255, 8+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\nstatic const uint8x16_t kHT[4] = {\n    {0,16,0,16,0,16,0,16,0,16,0,16,0,16,0,16},\n    {0,0,16,16,0,0,16,16,0,0,16,16,0,0,16,16},\n    {0,0,0,0,16,16,16,16,0,0,0,0,16,16,16,16},\n    {0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16}};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\nKFN uint8x16_t hb(uint8x16_t idx, uint8x16_t T) { return vqtbl1q_u8(T, idx); }\nKFN uint8x16_t ins_lo(uint8x16_t z, uint8x16_t s, uint8x16_t m0F) {\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(s) : \"w\"(z), \"w\"(m0F));\n    return s;\n}\nKFN uint8x16_t ins_hi(uint8x16_t z, uint8x16_t s) {\n    return vsriq_n_u8(s, z, 4);\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n#define PFK(p) __builtin_prefetch((const void*)(p), 0, 3)\n#define PFK_BLK(p) do { PFK(p); PFK((p) + 64); PFK((p) + 128); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq, float mscale,\n                  const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    const float32x4_t vms = {1.f, mscale, 1.f, mscale};\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PF_BLK(pf0 + i * BLK);\n            PF_BLK(pf1 + i * BLK);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t scz   = vreinterpretq_u8_u64(vzip1q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vmulq_f32(vcvt_f32_f16(hv), vms);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            uint64x2_t h0a = vreinterpretq_u64_u8(vld1q_u8(blk0 + 16));\n            uint64x2_t h0b = vreinterpretq_u64_u8(vld1q_u8(blk0 + 32));\n            uint64x2_t h1a = vreinterpretq_u64_u8(vld1q_u8(blk1 + 16));\n            uint64x2_t h1b = vreinterpretq_u64_u8(vld1q_u8(blk1 + 32));\n            uint8x16_t zh[4];\n            zh[0] = vreinterpretq_u8_u64(vzip1q_u64(h0a, h1a));\n            zh[1] = vreinterpretq_u8_u64(vzip2q_u64(h0a, h1a));\n            zh[2] = vreinterpretq_u8_u64(vzip1q_u64(h0b, h1b));\n            zh[3] = vreinterpretq_u8_u64(vzip2q_u64(h0b, h1b));\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 48;\n            const uint8_t* q1 = blk1 + 48;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n#pragma clang loop unroll(full)\n            for (int c = 0; c < 4; ++c) {\n                uint8x16_t idx[4];\n                if (c == 0) { for (int t = 0; t < 4; ++t) idx[t] = vandq_u8(zh[t], m4); }\n                else if (c == 2) { for (int t = 0; t < 4; ++t) idx[t] = vshrq_n_u8(zh[t], 4); }\n                else { for (int t = 0; t < 4; ++t) idx[t] = (c == 1) ? vandq_u8(zh[t], m4) : vshrq_n_u8(zh[t], 4); }\n                const uint8x16_t Tlo = kHT[(2 * c) & 3];\n                const uint8x16_t Thi = kHT[(2 * c + 1) & 3];\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl1q_u8(scz, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl1q_u8(scz, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = ins_lo(z0, hb(idx[0], Tlo), m4);\n                uint8x16_t l1 = ins_lo(z1, hb(idx[1], Tlo), m4);\n                uint8x16_t l2 = ins_lo(z2, hb(idx[2], Tlo), m4);\n                uint8x16_t l3 = ins_lo(z3, hb(idx[3], Tlo), m4);\n                uint8x16_t h0 = ins_hi(z0, hb(idx[0], Thi));\n                uint8x16_t h1 = ins_hi(z1, hb(idx[1], Thi));\n                uint8x16_t h2 = ins_hi(z2, hb(idx[2], Thi));\n                uint8x16_t h3 = ins_hi(z3, hb(idx[3], Thi));\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                for (int r = 0; r < R; ++r) {\n                    const int8_t* ap = apr + r * 128;\n                    int32x4_t uu = vusmmlaq_s32(zero32, l0, vld1q_s8(ap + 0));\n                    uu = vusmmlaq_s32(uu, l1, vld1q_s8(ap + 16));\n                    uu = vusmmlaq_s32(uu, l2, vld1q_s8(ap + 32));\n                    uu = vusmmlaq_s32(uu, l3, vld1q_s8(ap + 48));\n                    acc[r] = (c == 0) ? vmulq_s32(uu, cE) : vmlaq_s32(acc[r], uu, cE);\n                    int32x4_t vv = vusmmlaq_s32(zero32, h0, vld1q_s8(ap + 64));\n                    vv = vusmmlaq_s32(vv, h1, vld1q_s8(ap + 80));\n                    vv = vusmmlaq_s32(vv, h2, vld1q_s8(ap + 96));\n                    vv = vusmmlaq_s32(vv, h3, vld1q_s8(ap + 112));\n                    if (SPLIT) accH[r] = (c == 0) ? vmulq_s32(vv, cO) : vmlaq_s32(accH[r], vv, cO);\n                    else       acc[r] = vmlaq_s32(acc[r], vv, cO);\n                }\n            }\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                int32x4_t mm = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bsq + so * 16));\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n                facc[r] = vmlsq_f32(facc[r], vcvtq_f32_s32(mm), dminvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv2(const int8_t* q8, const int8_t* bsc, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f), fmin = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PFK_BLK(blk0 + MVPF * K_bytes);\n            PFK_BLK(blk1 + MVPF * K_bytes);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n            int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n            int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n            int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n            uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32))));\n            float32x4_t cmin = vmulq_f32(vtrn2q_f32(v, v), kMinMul);\n            uint8x16_t qh0a = vld1q_u8(blk0 + 16), qh0b = vld1q_u8(blk0 + 32);\n            uint8x16_t qh1a = vld1q_u8(blk1 + 16), qh1b = vld1q_u8(blk1 + 32);\n            int32x4_t acc0 = zero32, acc1 = zero32;\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                const uint8x16_t Tlo = kHT[(2 * c) & 3];\n                const uint8x16_t Thi = kHT[(2 * c + 1) & 3];\n                {\n                    const uint8_t* q = blk0 + 48 + 32 * c;\n                    uint8x16_t i0 = (c < 2) ? vandq_u8(qh0a, m4) : vshrq_n_u8(qh0a, 4);\n                    uint8x16_t i1 = (c < 2) ? vandq_u8(qh0b, m4) : vshrq_n_u8(qh0b, 4);\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, ins_lo(a0, hb(i0,Tlo), m4), y0);\n                    ul = vusdotq_s32(ul, ins_lo(a1, hb(i1,Tlo), m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, ins_hi(a0, hb(i0,Thi)), y2);\n                    uh = vusdotq_s32(uh, ins_hi(a1, hb(i1,Thi)), y3);\n                    if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                    else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                    else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                    else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                }\n                {\n                    const uint8_t* q = blk1 + 48 + 32 * c;\n                    uint8x16_t i0 = (c < 2) ? vandq_u8(qh1a, m4) : vshrq_n_u8(qh1a, 4);\n                    uint8x16_t i1 = (c < 2) ? vandq_u8(qh1b, m4) : vshrq_n_u8(qh1b, 4);\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, ins_lo(a0, hb(i0,Tlo), m4), y0);\n                    ul = vusdotq_s32(ul, ins_lo(a1, hb(i1,Tlo), m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, ins_hi(a0, hb(i0,Thi)), y2);\n                    uh = vusdotq_s32(uh, ins_hi(a1, hb(i1,Thi)), y3);\n                    if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                    else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                    else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                    else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                }\n            }\n            int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n            fmin = vmlsq_f32(fmin, vcvtq_f32_s32(mm), cmin);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(acc0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(acc1), v, 2);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        float32x2_t m2 = vpadd_f32(vget_low_f32(fmin), vget_high_f32(fmin));\n        vst1_f32(out + 2 * np, vmul_n_f32(vadd_f32(s2, m2), da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, float mscale, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, mscale, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, true, 3)\nTILE_ENTRY(rr1, 1, true, 3)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8, const int8_t* bsc,\n    float da, const uint8_t* B, float* out) { run_mv2(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack, bsq;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        bsq.resize((size_t)P * K_blk * 16);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        quantize_row(A, q8[0], bs0, &dav[0]);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv2(q8[0], bsc, dav[0], B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    int maxabs = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, &dav[2 * pp + rr]);\n                    for (int j = 0; j < K_blk * 8; ++j) { int a = bsr[j] < 0 ? -bsr[j] : bsr[j]; if (a > maxabs) maxabs = a; }\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    int sh = 0;\n    while ((maxabs >> sh) > 127) ++sh;\n    const int rnd = sh ? (1 << (sh - 1)) : 0;\n    const float mscale = (float)(1 << sh);\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    int v = (bsr[j] + rnd) >> sh;\n                    if (v > 127) v = 127;\n                    if (v < -128) v = -128;\n                    bsq[so * 16 + rr * 8 + j] = (int8_t)v;\n                }\n            }\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq.data() + (size_t)p0 * K_blk * 16;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, mscale, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+   "content": "// Q5_K x Q8_K gemm, AArch64 i8mm (usmmla) 2x2-tile kernel for K=2560 (K_blk=10), N=8192.\n// v18: verbatim re-sample of v17 (final checkpoint). v17 = v14 (aliasing-safe asm) with ORDER_H=0.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n#define BLK 176\n\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 8\n#endif\n#ifndef NB\n#define NB 64\n#endif\n#ifndef PFNP8\n#define PFNP8 1\n#endif\n#ifndef PFNP4\n#define PFNP4 1\n#endif\n#ifndef PFNP2\n#define PFNP2 3\n#endif\n#ifndef PFNP1\n#define PFNP1 3\n#endif\n#ifndef ORDER_H\n#define ORDER_H 0\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, int16_t* bs, float* da) {\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int i = 0; i < K_blk; ++i) {\n        const uint16_t* xb = x + i * 256;\n        float32x4_t vmax = vdupq_n_f32(0.f);\n        for (int l = 0; l < 256; l += 8) {\n            uint16x8_t h = vld1q_u16(xb + l);\n            float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n            float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n            vmax = vmaxq_f32(vmax, vmaxq_f32(vabsq_f32(f0), vabsq_f32(f1)));\n        }\n        const float amax = vmaxvq_f32(vmax);\n        int8_t* qb = q8 + i * 256;\n        int16_t* bsb = bs + i * 8;\n        if (amax == 0.f) {\n            memset(qb, 0, 256);\n            for (int j = 0; j < 8; ++j) bsb[j] = 0;\n            da[i] = 0.f;\n            continue;\n        }\n        float maxv = 0.f;\n        for (int l = 0; l < 256; ++l) {\n            uint32_t b = (uint32_t)xb[l] << 16; float f; memcpy(&f, &b, 4);\n            if (fabsf(f) == amax) { maxv = f; break; }\n        }\n        const float iscale = -127.f / maxv;\n        const float32x4_t vis = vdupq_n_f32(iscale);\n        for (int j = 0; j < 8; ++j) {\n            int32x4_t s = vdupq_n_s32(0);\n            int8_t* dst = qb + j * 32;\n            const uint16_t* src = xb + j * 32;\n            for (int l = 0; l < 32; l += 8) {\n                uint16x8_t h = vld1q_u16(src + l);\n                float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n                float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n                int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n                int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n                s = vaddq_s32(s, vaddq_s32(i0, i1));\n                int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n                vst1_s8(dst + l, vqmovn_s16(n16));\n            }\n            bsb[j] = (int16_t)vaddvq_s32(s);\n        }\n        da[i] = 1.0f / iscale;\n    }\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int8_t* s0 = q0 + i * 256 + c * 64;\n            const int8_t* s1 = q1 + i * 256 + c * 64;\n            for (int t = 0; t < 4; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(s0 + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(s1 + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\nstatic const uint8x16_t kIdxA  = {0,1,2,3, 8,9,10,11, 4,5,6,7, 8,9,10,11};\nstatic const uint8x16_t kIdxB  = {0,1,2,3, 0,1,2,3, 4,5,6,7, 4,5,6,7};\nstatic const int8x16_t  kShA   = {0,0,0,0, 0,0,0,0, 0,0,0,0, -4,-4,-4,-4};\nstatic const uint8x16_t kBitM  = {0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0, 0xC0,0xC0,0xC0,0xC0, 0xF0,0xF0,0xF0,0xF0};\nstatic const uint8x16_t kWlo = {0,255,255,255, 1,255,255,255, 2,255,255,255, 3,255,255,255};\nstatic const uint8x16_t kWhi = {4,255,255,255, 5,255,255,255, 6,255,255,255, 7,255,255,255};\n#define COEF_IDX(j) {(j),255,255,255, (j),255,255,255, 8+(j),255,255,255, 8+(j),255,255,255}\nstatic const uint8x16_t kCoef[8] = {\n    COEF_IDX(0), COEF_IDX(1), COEF_IDX(2), COEF_IDX(3),\n    COEF_IDX(4), COEF_IDX(5), COEF_IDX(6), COEF_IDX(7)};\nstatic const float32x4_t kMinMul = {1.f, 128.f, 1.f, 128.f};\nstatic const uint8x16_t kHT[4] = {\n    {0,16,0,16,0,16,0,16,0,16,0,16,0,16,0,16},\n    {0,0,16,16,0,0,16,16,0,0,16,16,0,0,16,16},\n    {0,0,0,0,16,16,16,16,0,0,0,0,16,16,16,16},\n    {0,0,0,0,0,0,0,0,16,16,16,16,16,16,16,16}};\n\nKFN uint8x16_t decode_scales(uint8x16_t q) {\n    uint8x16_t A = vshlq_u8(vqtbl1q_u8(q, kIdxA), kShA);\n    uint8x16_t Bv = vshrq_n_u8(vqtbl1q_u8(q, kIdxB), 2);\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(A) : \"w\"(Bv), \"w\"(kBitM));\n    return A;\n}\n\nKFN uint8x16_t hb(uint8x16_t idx, uint8x16_t T) { return vqtbl1q_u8(T, idx); }\nKFN uint8x16_t ins_lo(uint8x16_t z, uint8x16_t s, uint8x16_t m0F) {\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(s) : \"w\"(z), \"w\"(m0F));\n    return s;\n}\nKFN uint8x16_t ins_hi(uint8x16_t z, uint8x16_t s) {\n    return vsriq_n_u8(s, z, 4);\n}\n\nstruct ARow { int8_t b[64]; };\nstruct ARow2 { int8_t b[192]; };\ntemplate <bool FIRST>\nKFN void mmla_row(int32x4_t& acc, uint8x16_t l0, uint8x16_t l1, uint8x16_t l2, uint8x16_t l3,\n                  int32x4_t c, const int8_t* ap) {\n    uint8x16_t a0, a1;\n    if (FIRST) {\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"movi %[acc].2d, #0\\n\\t\"\n                \"usmmla %[acc].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[acc].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"ldp %q[a0], %q[a1], [%[ap], #32]\\n\\t\"\n                \"usmmla %[acc].4s, %[l2].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[acc].4s, %[l3].16b, %[a1].16b\\n\\t\"\n                \"mul %[acc].4s, %[acc].4s, %[c].4s\"\n                : [acc] \"=&w\"(acc), [a0] \"=&w\"(a0), [a1] \"=&w\"(a1)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow*)ap));\n    } else {\n        int32x4_t u;\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"movi %[u].2d, #0\\n\\t\"\n                \"usmmla %[u].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"ldp %q[a0], %q[a1], [%[ap], #32]\\n\\t\"\n                \"usmmla %[u].4s, %[l2].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l3].16b, %[a1].16b\\n\\t\"\n                \"mla %[acc].4s, %[u].4s, %[c].4s\"\n                : [acc] \"+w\"(acc), [a0] \"=&w\"(a0), [a1] \"=&w\"(a1), [u] \"=&w\"(u)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow*)ap));\n    }\n}\ntemplate <bool FIRST>\nKFN void mmla_row2(int32x4_t& acc0, int32x4_t& acc1, uint8x16_t l0, uint8x16_t l1, uint8x16_t l2, uint8x16_t l3,\n                   int32x4_t c, const int8_t* ap) {\n    uint8x16_t a0, a1, b0, b1;\n    if (FIRST) {\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"ldp %q[b0], %q[b1], [%[ap], #128]\\n\\t\"\n                \"movi %[acc0].2d, #0\\n\\t\"\n                \"movi %[acc1].2d, #0\\n\\t\"\n                \"usmmla %[acc0].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[acc1].4s, %[l0].16b, %[b0].16b\\n\\t\"\n                \"usmmla %[acc0].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[acc1].4s, %[l1].16b, %[b1].16b\\n\\t\"\n                \"ldp %q[a0], %q[a1], [%[ap], #32]\\n\\t\"\n                \"ldp %q[b0], %q[b1], [%[ap], #160]\\n\\t\"\n                \"usmmla %[acc0].4s, %[l2].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[acc1].4s, %[l2].16b, %[b0].16b\\n\\t\"\n                \"usmmla %[acc0].4s, %[l3].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[acc1].4s, %[l3].16b, %[b1].16b\\n\\t\"\n                \"mul %[acc0].4s, %[acc0].4s, %[c].4s\\n\\t\"\n                \"mul %[acc1].4s, %[acc1].4s, %[c].4s\"\n                : [acc0] \"=&w\"(acc0), [acc1] \"=&w\"(acc1),\n                  [a0] \"=&w\"(a0), [a1] \"=&w\"(a1), [b0] \"=&w\"(b0), [b1] \"=&w\"(b1)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow2*)ap));\n    } else {\n        int32x4_t u, v;\n        __asm__(\"ldp %q[a0], %q[a1], [%[ap]]\\n\\t\"\n                \"ldp %q[b0], %q[b1], [%[ap], #128]\\n\\t\"\n                \"movi %[u].2d, #0\\n\\t\"\n                \"movi %[v].2d, #0\\n\\t\"\n                \"usmmla %[u].4s, %[l0].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l0].16b, %[b0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l1].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l1].16b, %[b1].16b\\n\\t\"\n                \"ldp %q[a0], %q[a1], [%[ap], #32]\\n\\t\"\n                \"ldp %q[b0], %q[b1], [%[ap], #160]\\n\\t\"\n                \"usmmla %[u].4s, %[l2].16b, %[a0].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l2].16b, %[b0].16b\\n\\t\"\n                \"usmmla %[u].4s, %[l3].16b, %[a1].16b\\n\\t\"\n                \"usmmla %[v].4s, %[l3].16b, %[b1].16b\\n\\t\"\n                \"mla %[acc0].4s, %[u].4s, %[c].4s\\n\\t\"\n                \"mla %[acc1].4s, %[v].4s, %[c].4s\"\n                : [acc0] \"+w\"(acc0), [acc1] \"+w\"(acc1),\n                  [a0] \"=&w\"(a0), [a1] \"=&w\"(a1), [b0] \"=&w\"(b0), [b1] \"=&w\"(b1), [u] \"=&w\"(u), [v] \"=&w\"(v)\n                : [l0] \"w\"(l0), [l1] \"w\"(l1), [l2] \"w\"(l2), [l3] \"w\"(l3), [c] \"w\"(c), [ap] \"r\"(ap),\n                  \"m\"(*(const ARow2*)ap));\n    }\n}\n\ntemplate <int R, bool FIRST>\nKFN void mmla_rows(int32x4_t* acc, uint8x16_t l0, uint8x16_t l1, uint8x16_t l2, uint8x16_t l3,\n                   int32x4_t c, const int8_t* apr, int off) {\n    if (R == 1) {\n        mmla_row<FIRST>(acc[0], l0, l1, l2, l3, c, apr + off);\n    } else {\n        for (int r = 0; r < R; r += 2)\n            mmla_row2<FIRST>(acc[r], acc[r + 1], l0, l1, l2, l3, c, apr + r * 128 + off);\n    }\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); } while (0)\n#define PFK(p) __builtin_prefetch((const void*)(p), 0, 3)\n#define PFK_BLK(p) do { PFK(p); PFK((p) + 64); PFK((p) + 128); } while (0)\n#define BARRIER() __asm__ volatile(\"\" ::: \"memory\")\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\ntemplate <int R, bool SPLIT, int PFNP>\nKFN void run_rows(const int8_t* gp, const int8_t* bsq, const float* dab,\n                  const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    alignas(64) float obuf[2 * R * 2 * NB];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PF_BLK(pf0 + i * BLK);\n            PF_BLK(pf1 + i * BLK);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            uint8x16_t scz   = vreinterpretq_u8_u64(vzip1q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint8x16_t mn_op = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float16x4_t hv = vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)));\n            float32x4_t v = vcvt_f32_f16(hv);\n            float32x4_t dvec = vtrn1q_f32(v, v);\n            float32x4_t dminvec = vtrn2q_f32(v, v);\n\n            uint64x2_t h0a = vreinterpretq_u64_u8(vld1q_u8(blk0 + 16));\n            uint64x2_t h0b = vreinterpretq_u64_u8(vld1q_u8(blk0 + 32));\n            uint64x2_t h1a = vreinterpretq_u64_u8(vld1q_u8(blk1 + 16));\n            uint64x2_t h1b = vreinterpretq_u64_u8(vld1q_u8(blk1 + 32));\n            uint8x16_t zh[4];\n            zh[0] = vreinterpretq_u8_u64(vzip1q_u64(h0a, h1a));\n            zh[1] = vreinterpretq_u8_u64(vzip2q_u64(h0a, h1a));\n            zh[2] = vreinterpretq_u8_u64(vzip1q_u64(h0b, h1b));\n            zh[3] = vreinterpretq_u8_u64(vzip2q_u64(h0b, h1b));\n\n            int32x4_t acc[R], accH[R];\n            const uint8_t* q0 = blk0 + 48;\n            const uint8_t* q1 = blk1 + 48;\n            const int8_t* apc = gp + (size_t)i * (4 * R * 128);\n#pragma clang loop unroll(full)\n            for (int c = 0; c < 4; ++c) {\n                BARRIER();\n                uint8x16_t idx[4];\n                if (c < 2) { for (int t = 0; t < 4; ++t) idx[t] = vandq_u8(zh[t], m4); }\n                else       { for (int t = 0; t < 4; ++t) idx[t] = vshrq_n_u8(zh[t], 4); }\n                const uint8x16_t Tlo = kHT[(2 * c) & 3];\n                const uint8x16_t Thi = kHT[(2 * c + 1) & 3];\n                int32x4_t cE = vreinterpretq_s32_u8(vqtbl1q_u8(scz, kCoef[2 * c]));\n                int32x4_t cO = vreinterpretq_s32_u8(vqtbl1q_u8(scz, kCoef[2 * c + 1]));\n                uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c));\n                uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 32 * c + 16));\n                uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c));\n                uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 32 * c + 16));\n                uint8x16_t z0 = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n                uint8x16_t z1 = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n                uint8x16_t z2 = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n                uint8x16_t z3 = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n                uint8x16_t l0 = ins_lo(z0, hb(idx[0], Tlo), m4);\n                uint8x16_t l1 = ins_lo(z1, hb(idx[1], Tlo), m4);\n                uint8x16_t l2 = ins_lo(z2, hb(idx[2], Tlo), m4);\n                uint8x16_t l3 = ins_lo(z3, hb(idx[3], Tlo), m4);\n                const int8_t* apr = apc + (size_t)c * (R * 128);\n                if (c == 0) mmla_rows<R, true >(acc, l0, l1, l2, l3, cE, apr, 0);\n                else        mmla_rows<R, false>(acc, l0, l1, l2, l3, cE, apr, 0);\n#if ORDER_H\n                __asm__(\"\" : \"+w\"(z0), \"+w\"(z1), \"+w\"(z2), \"+w\"(z3), \"+w\"(acc[R - 1]));\n#endif\n                uint8x16_t h0 = ins_hi(z0, hb(idx[0], Thi));\n                uint8x16_t h1 = ins_hi(z1, hb(idx[1], Thi));\n                uint8x16_t h2 = ins_hi(z2, hb(idx[2], Thi));\n                uint8x16_t h3 = ins_hi(z3, hb(idx[3], Thi));\n                if (SPLIT) {\n                    if (c == 0) mmla_rows<R, true >(accH, h0, h1, h2, h3, cO, apr, 64);\n                    else        mmla_rows<R, false>(accH, h0, h1, h2, h3, cO, apr, 64);\n                } else {\n                    mmla_rows<R, false>(acc, h0, h1, h2, h3, cO, apr, 64);\n                }\n            }\n            BARRIER();\n            for (int r = 0; r < R; ++r) {\n                const size_t so = ((size_t)r * K_blk + i);\n                const int8_t* bp = bsq + so * 32;\n                int32x4_t mlo = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bp));\n                int32x4_t mhi = vusmmlaq_s32(zero32, mn_op, vld1q_s8(bp + 16));\n                int32x4_t mm  = vmlaq_n_s32(mlo, mhi, 128);\n                int32x4_t a = SPLIT ? vaddq_s32(acc[r], accH[r]) : acc[r];\n                float32x4_t t = vmulq_f32(vcvtq_f32_s32(a), dvec);\n                t = vmlsq_f32(t, vcvtq_f32_s32(mm), dminvec);\n                facc[r] = vfmaq_f32(facc[r], t, vld1q_f32(dab + so * 4));\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, vget_low_f32(vuzp1q_f32(f, f)));\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, vget_low_f32(vuzp2q_f32(f, f)));\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\nKFN void run_mv2(const int8_t* q8, const int8_t* bsc, const float* da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f), fmin = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const int8x16_t bsv = vld1q_s8(bsc + (size_t)i * 16);\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PFK_BLK(blk0 + MVPF * K_bytes);\n            PFK_BLK(blk1 + MVPF * K_bytes);\n            uint8x16_t dec0 = decode_scales(vld1q_u8(blk0 + 4));\n            uint8x16_t dec1 = decode_scales(vld1q_u8(blk1 + 4));\n            int32x4_t S0lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWlo));\n            int32x4_t S0hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec0, kWhi));\n            int32x4_t S1lo = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWlo));\n            int32x4_t S1hi = vreinterpretq_s32_u8(vqtbl1q_u8(dec1, kWhi));\n            uint8x16_t mn = vreinterpretq_u8_u64(vzip2q_u64(vreinterpretq_u64_u8(dec0), vreinterpretq_u64_u8(dec1)));\n            uint32_t w0, w1; memcpy(&w0, blk0, 4); memcpy(&w1, blk1, 4);\n            float32x4_t v = vmulq_n_f32(vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 32)))), da[i]);\n            float32x4_t cmin = vtrn2q_f32(v, v);\n            uint8x16_t qh0a = vld1q_u8(blk0 + 16), qh0b = vld1q_u8(blk0 + 32);\n            uint8x16_t qh1a = vld1q_u8(blk1 + 16), qh1b = vld1q_u8(blk1 + 32);\n            int32x4_t acc0 = zero32, acc1 = zero32;\n            for (int c = 0; c < 4; ++c) {\n                int8x16_t y0 = vld1q_s8(y + 64 * c + 0);\n                int8x16_t y1 = vld1q_s8(y + 64 * c + 16);\n                int8x16_t y2 = vld1q_s8(y + 64 * c + 32);\n                int8x16_t y3 = vld1q_s8(y + 64 * c + 48);\n                const uint8x16_t Tlo = kHT[(2 * c) & 3];\n                const uint8x16_t Thi = kHT[(2 * c + 1) & 3];\n                {\n                    const uint8_t* q = blk0 + 48 + 32 * c;\n                    uint8x16_t i0 = (c < 2) ? vandq_u8(qh0a, m4) : vshrq_n_u8(qh0a, 4);\n                    uint8x16_t i1 = (c < 2) ? vandq_u8(qh0b, m4) : vshrq_n_u8(qh0b, 4);\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, ins_lo(a0, hb(i0,Tlo), m4), y0);\n                    ul = vusdotq_s32(ul, ins_lo(a1, hb(i1,Tlo), m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, ins_hi(a0, hb(i0,Thi)), y2);\n                    uh = vusdotq_s32(uh, ins_hi(a1, hb(i1,Thi)), y3);\n                    if (c == 0)      { acc0 = vmulq_laneq_s32(ul, S0lo, 0);       acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 1); }\n                    else if (c == 1) { acc0 = vmlaq_laneq_s32(acc0, ul, S0lo, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0lo, 3); }\n                    else if (c == 2) { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 0); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 1); }\n                    else             { acc0 = vmlaq_laneq_s32(acc0, ul, S0hi, 2); acc0 = vmlaq_laneq_s32(acc0, uh, S0hi, 3); }\n                }\n                {\n                    const uint8_t* q = blk1 + 48 + 32 * c;\n                    uint8x16_t i0 = (c < 2) ? vandq_u8(qh1a, m4) : vshrq_n_u8(qh1a, 4);\n                    uint8x16_t i1 = (c < 2) ? vandq_u8(qh1b, m4) : vshrq_n_u8(qh1b, 4);\n                    uint8x16_t a0 = vld1q_u8(q), a1 = vld1q_u8(q + 16);\n                    int32x4_t ul = vusdotq_s32(zero32, ins_lo(a0, hb(i0,Tlo), m4), y0);\n                    ul = vusdotq_s32(ul, ins_lo(a1, hb(i1,Tlo), m4), y1);\n                    int32x4_t uh = vusdotq_s32(zero32, ins_hi(a0, hb(i0,Thi)), y2);\n                    uh = vusdotq_s32(uh, ins_hi(a1, hb(i1,Thi)), y3);\n                    if (c == 0)      { acc1 = vmulq_laneq_s32(ul, S1lo, 0);       acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 1); }\n                    else if (c == 1) { acc1 = vmlaq_laneq_s32(acc1, ul, S1lo, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1lo, 3); }\n                    else if (c == 2) { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 0); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 1); }\n                    else             { acc1 = vmlaq_laneq_s32(acc1, ul, S1hi, 2); acc1 = vmlaq_laneq_s32(acc1, uh, S1hi, 3); }\n                }\n            }\n            int32x4_t mm = vusmmlaq_s32(zero32, mn, bsv);\n            fmin = vmlsq_f32(fmin, vcvtq_f32_s32(mm), cmin);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(acc0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(acc1), v, 2);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        float32x4_t fm = vmulq_f32(fmin, kMinMul);\n        float32x2_t m2 = vpadd_f32(vget_low_f32(fm), vget_high_f32(fm));\n        vst1_f32(out + 2 * np, vadd_f32(s2, m2));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, SPLIT, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, const int8_t* bsq, \\\n    const float* dab, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, SPLIT, PFNP>(gp, bsq, dab, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr8, 8, false, PFNP8)\nTILE_ENTRY(rr4, 4, false, PFNP4)\nTILE_ENTRY(rr2, 2, true, PFNP2)\nTILE_ENTRY(rr1, 1, true, PFNP1)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8, const int8_t* bsc,\n    const float* da, const uint8_t* B, float* out) { run_mv2(q8, bsc, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack_v, bsq_v;\n    static std::vector<int16_t> bsall;\n    static std::vector<float> dav, dab;\n    if ((int)apack_v.size() < P * K_blk * 512 + 64) {\n        apack_v.resize((size_t)P * K_blk * 512 + 64);\n        bsq_v.resize((size_t)P * K_blk * 32 + 64);\n        bsall.resize((size_t)P * 2 * K_blk * 8);\n        dav.resize((size_t)P * 2 * K_blk);\n        dab.resize((size_t)P * K_blk * 4);\n    }\n    int8_t* apack = (int8_t*)(((uintptr_t)apack_v.data() + 63) & ~(uintptr_t)63);\n    int8_t* bsq = (int8_t*)(((uintptr_t)bsq_v.data() + 63) & ~(uintptr_t)63);\n    alignas(64) static int8_t q8[2][K];\n\n    if (M == 1) {\n        int16_t bs0[K_blk * 8];\n        float da0[K_blk];\n        quantize_row(A, q8[0], bs0, da0);\n        alignas(16) int8_t bsc[K_blk * 16];\n        for (int i = 0; i < K_blk; ++i) {\n            for (int j = 0; j < 8; ++j) {\n                int v = bs0[i * 8 + j];\n                int lo = ((v + 64) & 127) - 64;\n                int hi = (v - lo) >> 7;\n                bsc[i * 16 + j] = (int8_t)lo;\n                bsc[i * 16 + 8 + j] = (int8_t)hi;\n            }\n        }\n        mv2(q8[0], bsc, da0, B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                int16_t* bsr = bsall.data() + (size_t)m * K_blk * 8;\n                float* dar = dav.data() + (size_t)m * K_blk;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], bsr, dar);\n                } else {\n                    memset(q8[rr], 0, K);\n                    memset(bsr, 0, K_blk * 8 * sizeof(int16_t));\n                    for (int i = 0; i < K_blk; ++i) dar[i] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n    for (int pp = 0; pp < P; ++pp) {\n        for (int i = 0; i < K_blk; ++i) {\n            const size_t so = (size_t)pp * K_blk + i;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int16_t* bsr = bsall.data() + (size_t)(2 * pp + rr) * K_blk * 8 + i * 8;\n                for (int j = 0; j < 8; ++j) {\n                    const int v = bsr[j];\n                    const int lo = ((v + 64) & 127) - 64;\n                    const int hi = (v - lo) >> 7;\n                    bsq[so * 32 + rr * 8 + j] = (int8_t)lo;\n                    bsq[so * 32 + 16 + rr * 8 + j] = (int8_t)hi;\n                }\n            }\n            const float d0 = dav[(size_t)(2 * pp) * K_blk + i];\n            const float d1 = dav[(size_t)(2 * pp + 1) * K_blk + i];\n            dab[so * 4 + 0] = d0; dab[so * 4 + 1] = d1; dab[so * 4 + 2] = d0; dab[so * 4 + 3] = d1;\n        }\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack + (size_t)p0 * K_blk * 512;\n                const int8_t* bq = bsq + (size_t)p0 * K_blk * 32;\n                const float* db = dab.data() + (size_t)p0 * K_blk * 4;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 8)      rr8(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, bq, db, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
   }
  ],
  "provenance": {
-  "run": "e2e-fable-lane1",
-  "submitted_version": "v16.cpp",
-  "time_speedup": 3.4175580676909862,
-  "evaluations": 20,
-  "server_calls": 41
+  "run": "e2e-fable2",
+  "submitted_version": "v18.cpp",
+  "time_speedup": 3.573490701041923,
+  "evaluations": 18,
+  "server_calls": 47
  }
 }

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q6_K_n1024_k2560.json

@@ -0,0 +1,46 @@
+{
+ "name": "claude-code-claude-fable-5-1-gatev2_gemm_ggml_q6_K_n1024_k2560",
+ "definition": "gemm_ggml_q6_K_n1024_k2560",
+ "dataset": "llama.cpp",
+ "author": "claude-code-claude-fable-5-1-gatev2",
+ "description": "Claude Code + claude-fable-5-1 (sve2, 40/50 budget, E2E Qwen3.5-4B run 2026-09-21) submitted kernel v14.cpp for gemm_ggml_q6_K_n1024_k2560; harness files from reference-scalar. Harness speedup vs baseline-llamacpp-arm on c8g.xlarge: 2.704x.",
+ "spec": {
+  "language": "cpp",
+  "target_hardware": [
+   "graviton4",
+   "aarch64-sve2"
+  ],
+  "entry_point": "gemm.cpp::armbench_entry_gemm",
+  "dependencies": [],
+  "isa_features": [
+   "sve2"
+  ],
+  "compile_flags": [
+   "-O3",
+   "-march=armv9-a+sve2",
+   "-std=c++14"
+  ],
+  "link_flags": []
+ },
+ "sources": [
+  {
+   "path": "gemm.h",
+   "content": "#pragma once\n#include <cstdint>\n\n// Per-definition constants for this gemm Q6_K (weight-only, ggml packed\n// layout) specialisation.\n// C[m, n] = sum_k A[m, k] * B[n, k]  (B is the [N, K] \"weight\" matrix, transposed)\n// A is a raw bf16 bit pattern (uint16_t) -- activations stay at the bf16\n// baseline tier (real GGML never stores activations statically in a\n// k-quant format either -- see kernel.cpp for the dynamic quantization this\n// implies).\n// B is ggml's real block_q6_K layout: K/256 consecutive 210-byte super-blocks\n// per row (K_bytes = K/256 * 210), each\n//   struct block_q6_K {\n//     uint8_t ql[128];    // [0:128]   low 4 bits: for 128-element half h (0..1)\n//                         //   and l in 0..31, ql[h*64+l] = elem h*128+l (low\n//                         //   nibble) | elem h*128+64+l (high nibble);\n//                         //   ql[h*64+32+l] = elem h*128+32+l (low) | elem\n//                         //   h*128+96+l (high)\n//     uint8_t qh[64];     // [128:192] high 2 bits: qh[h*32+l] bits 0-1, 2-3,\n//                         //   4-5, 6-7 = elems h*128 + {l, 32+l, 64+l, 96+l}\n//     int8_t  scales[16]; // [192:208] one signed scale per 16-element sub-block\n//     fp16    d;          // [208:210] super-block scale\n//   };\n// Sub-block j (16 elements) dequantizes as w = d*scales[j]*(q - 32), q in 0..63.\n// Output accumulates/returns in fp32.\nnamespace gemm_def {\nconstexpr int N = 1024;\nconstexpr int K = 2560;\nconstexpr int K_blk = 10;\nconstexpr int K_bytes = 2100;\n} // namespace gemm_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// M is the only var dim. A: (M, K) bf16; B_blocks: (N, K_bytes) uint8 ggml\n// block_q6_K rows; output: (M, N) float32.\nvoid inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M);\n#ifdef __cplusplus\n}\n#endif\n"
+  },
+  {
+   "path": "gemm.cpp",
+   "content": "// Binding harness: forwards straight to inner_gemm (no derived dims needed).\n// ABI: armbench_entry_gemm(A*, output*, B_blocks*, M)\n#include \"gemm.h\"\nusing namespace gemm_def;\n\nextern \"C\" int armbench_entry_gemm(const uint16_t* A, float* output,\n                                    const uint8_t* B_blocks, int M)\n{\n    inner_gemm(A, output, B_blocks, M);\n    return 0;\n}\n"
+  },
+  {
+   "path": "kernel.cpp",
+   "content": "// Q6_K x Q8_K gemm, AArch64 i8mm (smmla) 2x2-tile kernel for K=2560 (K_blk=10), N=1024.\n// Block (210 B): ql[128] (low nibbles), qh[64] (2 high bits x4 per byte), scales[16] int8, d fp16.\n// v8 decode: one TBL per qh nibble-index serves TWO groups: T[x] = (nib(x>>2)<<4) | nib(x),\n// nib(v) = ((v&3)-2)&0xF.  With oA = T[qh&15], oB = T[qh>>4], zA = ql[0..31], zB = ql[32..63]:\n//   g0 = SLI(zA, oA, 4)          g1 = BIT(oA, zB, 0x0F)\n//   g2 = SLI(USHR(zA,4), oB, 4)  g3 = SRI(oB, zB, 4)\n// giving the signed (value-32) bytes directly -> smmla/sdot signed x signed, no min term.\n// Tiles: R>=4 rolled row loop with memory int32 accumulators; R=1 applies scales by lane-broadcast\n// MLA into two accumulators (no coefficient vectors); R=2 uses TBL2+SSHR coefficient vectors.\n// v9: vectorised signed-max search in quantize_row (no scalar loop).  v10: R=16 tile for M=32.\n// v11: KS16=5 (two K passes for the R=16 tile, 40KB panels).  v14: MVPF=3.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n#define BLK 210\n#define OFF_QH 128\n#define OFF_SC 192\n#define OFF_D 208\n#define OPAQUE(v) __asm__(\"\" : \"+w\"(v))\n\n#ifndef KS16\n#define KS16 5\n#endif\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 3\n#endif\n#ifndef NB\n#define NB 32      // column pairs buffered before flushing to output\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, float* da) {\n    // signed value of largest magnitude (a sign flip of the scale cancels exactly in d*q8)\n    float32x4_t vmax = vdupq_n_f32(0.f), vmin = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(f0, f1));\n        vmin = vminq_f32(vmin, vminq_f32(f0, f1));\n    }\n    const float mx = vmaxvq_f32(vmax), mn = vminvq_f32(vmin);\n    const float maxv = (mx >= -mn) ? mx : mn;\n    if (maxv == 0.f) {\n        memset(q8, 0, K);\n        *da = 0.f;\n        return;\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n        int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n        int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n        vst1_s8(q8 + l, vqmovn_s16(n16));\n    }\n    *da = 1.0f / iscale;\n}\n\n// Activation panel layout: [block][chunk c=2h+p][rowpair r][128 B]; the 128 B are\n// [lo: k = h*128 + p*32 + 0..31][hi: k = h*128 + (p+2)*32 + 0..31], each as 4 x [r0 8B | r1 8B].\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            const int h = c >> 1, p = c & 1;\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int lo = i * 256 + h * 128 + p * 32;\n            const int hi = lo + 64;\n            for (int t = 0; t < 2; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(q0 + lo + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(q1 + lo + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n            for (int t = 0; t < 2; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(q0 + hi + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(q1 + hi + 16 * t));\n                vst1q_s8(dst + 64 + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 64 + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\n// T[x] = (nib(x>>2) << 4) | nib(x), nib(v) = ((v&3)-2)&0xF : {E,F,0,1}\n#define NIB(v) ((((v) & 3) - 2) & 0xF)\n#define TE(x) (uint8_t)((NIB((x) >> 2) << 4) | NIB(x))\nstatic const uint8x16_t kT = {TE(0),TE(1),TE(2),TE(3),TE(4),TE(5),TE(6),TE(7),TE(8),TE(9),TE(10),TE(11),TE(12),TE(13),TE(14),TE(15)};\n#define CI(j) {255,255,255,(j), 255,255,255,(j), 255,255,255,16+(j), 255,255,255,16+(j)}\nstatic const uint8x16_t kCI[16] = {\n    CI(0), CI(1), CI(2), CI(3), CI(4), CI(5), CI(6), CI(7),\n    CI(8), CI(9), CI(10), CI(11), CI(12), CI(13), CI(14), CI(15)};\n\nKFN int32x4_t coef(uint8x16x2_t sct, int j) {\n    return vshrq_n_s32(vreinterpretq_s32_u8(vqtbl2q_u8(sct, kCI[j])), 24);\n}\nKFN uint8x16_t bit_lo(uint8x16_t o, uint8x16_t z, uint8x16_t m0F) {   // (o & 0xF0) | (z & 0x0F)\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(o) : \"w\"(z), \"w\"(m0F));\n    return o;\n}\n// decode of one qh-group: zA (lo-group source), zB, oA = T[qh&15], oB = T[qh>>4]\nKFN uint8x16_t dec_g0(uint8x16_t zA, uint8x16_t oA) { return vsliq_n_u8(zA, oA, 4); }\nKFN uint8x16_t dec_g1(uint8x16_t zB, uint8x16_t oA, uint8x16_t m4) { return bit_lo(oA, zB, m4); }\nKFN uint8x16_t dec_g2(uint8x16_t zA, uint8x16_t oB) { return vsliq_n_u8(vshrq_n_u8(zA, 4), oB, 4); }\nKFN uint8x16_t dec_g3(uint8x16_t zB, uint8x16_t oB) { return vsriq_n_u8(oB, zB, 4); }\n\nKFN int32x4_t mm(int32x4_t acc, uint8x16_t w, const int8_t* a) {\n    return vmmlaq_s32(acc, vreinterpretq_s8_u8(w), vld1q_s8(a));\n}\ntemplate <int J> KFN int32x4_t mlaL(int32x4_t acc, int32x4_t d, const int32x4_t* S) {\n    return vmlaq_laneq_s32(acc, d, S[J >> 2], J & 3);\n}\ntemplate <int J> KFN int32x4_t mulL(int32x4_t d, const int32x4_t* S) {\n    return vmulq_laneq_s32(d, S[J >> 2], J & 3);\n}\nKFN void sxt_scales(const uint8_t* p, int32x4_t* S) {\n    int8x16_t sc = vld1q_s8((const int8_t*)p);\n    int16x8_t s16a = vmovl_s8(vget_low_s8(sc));\n    int16x8_t s16b = vmovl_high_s8(sc);\n    S[0] = vmovl_s16(vget_low_s16(s16a));\n    S[1] = vmovl_high_s16(s16a);\n    S[2] = vmovl_s16(vget_low_s16(s16b));\n    S[3] = vmovl_high_s16(s16b);\n    OPAQUE(S[0]); OPAQUE(S[1]); OPAQUE(S[2]); OPAQUE(S[3]);\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); PF((p) + 192); } while (0)\n#define PFK(p) __builtin_prefetch((const void*)(p), 0, 3)\n#define PFK_BLK(p) do { PFK(p); PFK((p) + 64); PFK((p) + 128); PFK((p) + 192); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\nstruct TileState {\n    const uint8_t* blk0; const uint8_t* blk1;\n    uint8x16_t oA[4], oB[4];\n    uint8x16x2_t sct;\n    int32x4_t S0[4], S1[4];\n    const int8_t* apc;\n};\n\n// One chunk (h, p): lo groups g=p (sub-blocks j0, j0+1), hi groups g=p+2 (j0+4, j0+5).\ntemplate <int R, bool DUAL, int H, int P>\nKFN void do_chunk(const TileState& ts, int32x4_t* acc, int32x4_t* accH, int32x4_t (*accb)[R],\n                  const int32x4_t zero32, const uint8x16_t m4) {\n    constexpr int c = 2 * H + P;\n    constexpr int j0 = H * 8 + 2 * P;\n    constexpr bool MEMACC = (R >= 4);\n    const uint8_t* q0 = ts.blk0 + H * 64 + P * 32;\n    const uint8_t* q1 = ts.blk1 + H * 64 + P * 32;\n    uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0));\n    uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 16));\n    uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1));\n    uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 16));\n    uint8x16_t z[4];\n    z[0] = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n    z[1] = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n    z[2] = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n    z[3] = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n    uint8x16_t l[4], hh[4];\n    for (int t = 0; t < 4; ++t) {\n        if (P == 0) { hh[t] = dec_g2(z[t], ts.oB[t]); l[t] = dec_g0(z[t], ts.oA[t]); }\n        else        { hh[t] = dec_g3(z[t], ts.oB[t]); l[t] = dec_g1(z[t], ts.oA[t], m4); }\n    }\n    const int8_t* apr = ts.apc + (size_t)c * (R * 128);\n    if (DUAL) {\n        // R == 1 only: acc = column-0 lanes (0,1) scaled by S0, accH = column-1 lanes (2,3) by S1\n        const int8_t* ap = apr;\n        int32x4_t uL0 = mm(mm(zero32, l[0], ap + 0), l[1], ap + 16);\n        int32x4_t uL1 = mm(mm(zero32, l[2], ap + 32), l[3], ap + 48);\n        int32x4_t uH0 = mm(mm(zero32, hh[0], ap + 64), hh[1], ap + 80);\n        int32x4_t uH1 = mm(mm(zero32, hh[2], ap + 96), hh[3], ap + 112);\n        int32x4_t a0 = (c == 0) ? mulL<j0>(uL0, ts.S0) : mlaL<j0>(acc[0], uL0, ts.S0);\n        int32x4_t a1 = (c == 0) ? mulL<j0>(uL0, ts.S1) : mlaL<j0>(accH[0], uL0, ts.S1);\n        a0 = mlaL<j0 + 1>(a0, uL1, ts.S0); a1 = mlaL<j0 + 1>(a1, uL1, ts.S1);\n        a0 = mlaL<j0 + 4>(a0, uH0, ts.S0); a1 = mlaL<j0 + 4>(a1, uH0, ts.S1);\n        a0 = mlaL<j0 + 5>(a0, uH1, ts.S0); a1 = mlaL<j0 + 5>(a1, uH1, ts.S1);\n        acc[0] = a0; accH[0] = a1;\n        return;\n    }\n    int32x4_t cL0 = coef(ts.sct, j0), cL1 = coef(ts.sct, j0 + 1);\n    int32x4_t cH0 = coef(ts.sct, j0 + 4), cH1 = coef(ts.sct, j0 + 5);\n    if (MEMACC) {\n        const int8_t* ap = apr;\n        int32x4_t* ab = accb[c & 1];\n#pragma clang loop unroll(disable)\n        for (int r = 0; r < R; ++r, ap += 128) {\n            int32x4_t uL0 = mm(mm(zero32, l[0], ap + 0), l[1], ap + 16);\n            int32x4_t uL1 = mm(mm(zero32, l[2], ap + 32), l[3], ap + 48);\n            int32x4_t uH0 = mm(mm(zero32, hh[0], ap + 64), hh[1], ap + 80);\n            int32x4_t uH1 = mm(mm(zero32, hh[2], ap + 96), hh[3], ap + 112);\n            int32x4_t a;\n            if (c < 2) {\n                a = vmulq_s32(uL0, cL0);\n            } else {\n                a = ab[r]; OPAQUE(a);\n                a = vmlaq_s32(a, uL0, cL0);\n            }\n            a = vmlaq_s32(a, uL1, cL1);\n            a = vmlaq_s32(a, uH0, cH0);\n            a = vmlaq_s32(a, uH1, cH1);\n            ab[r] = a;\n        }\n    } else {\n        for (int r = 0; r < R; ++r) {\n            const int8_t* ap = apr + r * 128;\n            int32x4_t uL0 = mm(mm(zero32, l[0], ap + 0), l[1], ap + 16);\n            int32x4_t uL1 = mm(mm(zero32, l[2], ap + 32), l[3], ap + 48);\n            int32x4_t uH0 = mm(mm(zero32, hh[0], ap + 64), hh[1], ap + 80);\n            int32x4_t uH1 = mm(mm(zero32, hh[2], ap + 96), hh[3], ap + 112);\n            acc[r] = (c == 0) ? vmulq_s32(uL0, cL0) : vmlaq_s32(acc[r], uL0, cL0);\n            acc[r] = vmlaq_s32(acc[r], uL1, cL1);\n            accH[r] = (c == 0) ? vmulq_s32(uH0, cH0) : vmlaq_s32(accH[r], uH0, cH0);\n            accH[r] = vmlaq_s32(accH[r], uH1, cH1);\n        }\n    }\n}\n\ntemplate <int H>\nKFN void prep_half(TileState& ts, const uint8x16_t m4) {\n    uint64x2_t q0a = vreinterpretq_u64_u8(vld1q_u8(ts.blk0 + OFF_QH + H * 32));\n    uint64x2_t q0b = vreinterpretq_u64_u8(vld1q_u8(ts.blk0 + OFF_QH + H * 32 + 16));\n    uint64x2_t q1a = vreinterpretq_u64_u8(vld1q_u8(ts.blk1 + OFF_QH + H * 32));\n    uint64x2_t q1b = vreinterpretq_u64_u8(vld1q_u8(ts.blk1 + OFF_QH + H * 32 + 16));\n    uint8x16_t zq[4];\n    zq[0] = vreinterpretq_u8_u64(vzip1q_u64(q0a, q1a));\n    zq[1] = vreinterpretq_u8_u64(vzip2q_u64(q0a, q1a));\n    zq[2] = vreinterpretq_u8_u64(vzip1q_u64(q0b, q1b));\n    zq[3] = vreinterpretq_u8_u64(vzip2q_u64(q0b, q1b));\n    for (int t = 0; t < 4; ++t) {\n        ts.oA[t] = vqtbl1q_u8(kT, vandq_u8(zq[t], m4));\n        ts.oB[t] = vqtbl1q_u8(kT, vshrq_n_u8(zq[t], 4));\n    }\n}\n\ntemplate <int R, bool DUAL, int PFNP>\nKFN void run_rows(const int8_t* gp, const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    constexpr bool MEMACC = (R >= 4);\n    alignas(64) float obuf[2 * R * 2 * NB];\n    alignas(16) int32x4_t accb[2][R];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            TileState ts;\n            ts.blk0 = b0 + i * BLK;\n            ts.blk1 = b1 + i * BLK;\n            PF_BLK(pf0 + i * BLK);\n            PF_BLK(pf1 + i * BLK);\n            if (DUAL) {\n                sxt_scales(ts.blk0 + OFF_SC, ts.S0);\n                sxt_scales(ts.blk1 + OFF_SC, ts.S1);\n            } else {\n                ts.sct.val[0] = vld1q_u8(ts.blk0 + OFF_SC);\n                ts.sct.val[1] = vld1q_u8(ts.blk1 + OFF_SC);\n            }\n            uint16_t w0, w1; memcpy(&w0, ts.blk0 + OFF_D, 2); memcpy(&w1, ts.blk1 + OFF_D, 2);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 16))));\n            float32x4_t dvec = vzip1q_f32(v, v);   // [d0 d0 d1 d1]\n            ts.apc = gp + (size_t)i * (4 * R * 128);\n\n            int32x4_t acc[R], accH[R];\n            prep_half<0>(ts, m4);\n            do_chunk<R, DUAL, 0, 0>(ts, acc, accH, accb, zero32, m4);\n            do_chunk<R, DUAL, 0, 1>(ts, acc, accH, accb, zero32, m4);\n            prep_half<1>(ts, m4);\n            do_chunk<R, DUAL, 1, 0>(ts, acc, accH, accb, zero32, m4);\n            do_chunk<R, DUAL, 1, 1>(ts, acc, accH, accb, zero32, m4);\n\n            for (int r = 0; r < R; ++r) {\n                int32x4_t a;\n                if (MEMACC)    a = vaddq_s32(accb[0][r], accb[1][r]);\n                else if (DUAL) a = vcombine_s32(vget_low_s32(acc[r]), vget_high_s32(accH[r]));\n                else           a = vaddq_s32(acc[r], accH[r]);\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\n// M == 1: one column at a time (2 per pass), sdot per 16-value sub-block, MLA-by-lane scales,\n// 4 independent accumulator chains per column.\n#define MV_SUB(jj, W, Y, SV, LANE) do { \\\n    int32x4_t dd = vdotq_s32(zero32, vreinterpretq_s8_u8(W), Y); \\\n    a##jj = vmlaq_laneq_s32(a##jj, dd, SV, LANE); } while (0)\n#define MV_SUB0(jj, W, Y, SV, LANE) do { \\\n    int32x4_t dd = vdotq_s32(zero32, vreinterpretq_s8_u8(W), Y); \\\n    a##jj = vmulq_laneq_s32(dd, SV, LANE); } while (0)\n\nKFN void mv_col(const uint8_t* blk, const int8_t* y, int32x4_t& tot, const int32x4_t zero32, const uint8x16_t m4) {\n    int32x4_t S[4];\n    sxt_scales(blk + OFF_SC, S);\n    int32x4_t a0, a1, a2, a3;\n#pragma clang loop unroll(full)\n    for (int h = 0; h < 2; ++h) {\n        const uint8_t* ql = blk + h * 64;\n        const uint8_t* qh = blk + OFF_QH + h * 32;\n        uint8x16_t A0 = vld1q_u8(ql), A1 = vld1q_u8(ql + 16), B0 = vld1q_u8(ql + 32), B1 = vld1q_u8(ql + 48);\n        uint8x16_t Q0 = vld1q_u8(qh), Q1 = vld1q_u8(qh + 16);\n        uint8x16_t oA0 = vqtbl1q_u8(kT, vandq_u8(Q0, m4)), oA1 = vqtbl1q_u8(kT, vandq_u8(Q1, m4));\n        uint8x16_t oB0 = vqtbl1q_u8(kT, vshrq_n_u8(Q0, 4)), oB1 = vqtbl1q_u8(kT, vshrq_n_u8(Q1, 4));\n        const int8_t* yy = y + h * 128;\n        int8x16_t y0 = vld1q_s8(yy), y1 = vld1q_s8(yy + 16), y2 = vld1q_s8(yy + 32), y3 = vld1q_s8(yy + 48);\n        int8x16_t y4 = vld1q_s8(yy + 64), y5 = vld1q_s8(yy + 80), y6 = vld1q_s8(yy + 96), y7 = vld1q_s8(yy + 112);\n        uint8x16_t w4 = dec_g2(A0, oB0);\n        uint8x16_t w5 = dec_g2(A1, oB1);\n        uint8x16_t w6 = dec_g3(B0, oB0);\n        uint8x16_t w7 = dec_g3(B1, oB1);\n        uint8x16_t w0 = dec_g0(A0, oA0);\n        uint8x16_t w1 = dec_g0(A1, oA1);\n        uint8x16_t w2 = dec_g1(B0, oA0, m4);\n        uint8x16_t w3 = dec_g1(B1, oA1, m4);\n        if (h == 0) {\n            MV_SUB0(0, w0, y0, S[0], 0); MV_SUB0(1, w1, y1, S[0], 1); MV_SUB0(2, w2, y2, S[0], 2); MV_SUB0(3, w3, y3, S[0], 3);\n            MV_SUB(0, w4, y4, S[1], 0); MV_SUB(1, w5, y5, S[1], 1); MV_SUB(2, w6, y6, S[1], 2); MV_SUB(3, w7, y7, S[1], 3);\n        } else {\n            MV_SUB(0, w0, y0, S[2], 0); MV_SUB(1, w1, y1, S[2], 1); MV_SUB(2, w2, y2, S[2], 2); MV_SUB(3, w3, y3, S[2], 3);\n            MV_SUB(0, w4, y4, S[3], 0); MV_SUB(1, w5, y5, S[3], 1); MV_SUB(2, w6, y6, S[3], 2); MV_SUB(3, w7, y7, S[3], 3);\n        }\n    }\n    tot = vaddq_s32(vaddq_s32(a0, a1), vaddq_s32(a2, a3));\n}\n\nKFN void run_mv2(const int8_t* q8, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PFK_BLK(blk0 + MVPF * K_bytes);\n            PFK_BLK(blk1 + MVPF * K_bytes);\n            uint16_t w0, w1; memcpy(&w0, blk0 + OFF_D, 2); memcpy(&w1, blk1 + OFF_D, 2);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 16))));\n            int32x4_t t0, t1;\n            mv_col(blk0, y, t0, zero32, m4);\n            mv_col(blk1, y, t1, zero32, m4);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(t0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(t1), v, 1);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        vst1_f32(out + 2 * np, vmul_n_f32(s2, da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, DUAL, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, DUAL, PFNP>(gp, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr16, 16, false, 1)\nTILE_ENTRY(rr8, 8, false, 1)\nTILE_ENTRY(rr4, 4, false, 1)\nTILE_ENTRY(rr2, 2, false, 2)\nTILE_ENTRY(rr1, 1, true, 2)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8,\n    float da, const uint8_t* B, float* out) { run_mv2(q8, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        float da;\n        quantize_row(A, q8[0], &da);\n        mv2(q8[0], da, B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 16 ? 16 : (rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1)));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 16 ? KS16 : (R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1)));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 16)     rr16(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 8) rr8(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+  }
+ ],
+ "provenance": {
+  "run": "e2e-fable-lane1",
+  "submitted_version": "v14.cpp",
+  "time_speedup": 2.704438384827637,
+  "evaluations": 17,
+  "server_calls": 41
+ }
+}

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q6_K_n248320_k2560.json

@@ -0,0 +1,46 @@
+{
+ "name": "claude-code-claude-fable-5-1-gatev2_gemm_ggml_q6_K_n248320_k2560",
+ "definition": "gemm_ggml_q6_K_n248320_k2560",
+ "dataset": "llama.cpp",
+ "author": "claude-code-claude-fable-5-1-gatev2",
+ "description": "Claude Code + claude-fable-5-1 (sve2, 40/50 budget, E2E Qwen3.5-4B run 2026-09-21) submitted kernel v18.cpp for gemm_ggml_q6_K_n248320_k2560; harness files from reference-scalar. Harness speedup vs baseline-llamacpp-arm on c8g.xlarge: 2.250x.",
+ "spec": {
+  "language": "cpp",
+  "target_hardware": [
+   "graviton4",
+   "aarch64-sve2"
+  ],
+  "entry_point": "gemm.cpp::armbench_entry_gemm",
+  "dependencies": [],
+  "isa_features": [
+   "sve2"
+  ],
+  "compile_flags": [
+   "-O3",
+   "-march=armv9-a+sve2",
+   "-std=c++14"
+  ],
+  "link_flags": []
+ },
+ "sources": [
+  {
+   "path": "gemm.h",
+   "content": "#pragma once\n#include <cstdint>\n\n// Per-definition constants for this gemm Q6_K (weight-only, ggml packed\n// layout) specialisation.\n// C[m, n] = sum_k A[m, k] * B[n, k]  (B is the [N, K] \"weight\" matrix, transposed)\n// A is a raw bf16 bit pattern (uint16_t) -- activations stay at the bf16\n// baseline tier (real GGML never stores activations statically in a\n// k-quant format either -- see kernel.cpp for the dynamic quantization this\n// implies).\n// B is ggml's real block_q6_K layout: K/256 consecutive 210-byte super-blocks\n// per row (K_bytes = K/256 * 210), each\n//   struct block_q6_K {\n//     uint8_t ql[128];    // [0:128]   low 4 bits: for 128-element half h (0..1)\n//                         //   and l in 0..31, ql[h*64+l] = elem h*128+l (low\n//                         //   nibble) | elem h*128+64+l (high nibble);\n//                         //   ql[h*64+32+l] = elem h*128+32+l (low) | elem\n//                         //   h*128+96+l (high)\n//     uint8_t qh[64];     // [128:192] high 2 bits: qh[h*32+l] bits 0-1, 2-3,\n//                         //   4-5, 6-7 = elems h*128 + {l, 32+l, 64+l, 96+l}\n//     int8_t  scales[16]; // [192:208] one signed scale per 16-element sub-block\n//     fp16    d;          // [208:210] super-block scale\n//   };\n// Sub-block j (16 elements) dequantizes as w = d*scales[j]*(q - 32), q in 0..63.\n// Output accumulates/returns in fp32.\nnamespace gemm_def {\nconstexpr int N = 248320;\nconstexpr int K = 2560;\nconstexpr int K_blk = 10;\nconstexpr int K_bytes = 2100;\n} // namespace gemm_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// M is the only var dim. A: (M, K) bf16; B_blocks: (N, K_bytes) uint8 ggml\n// block_q6_K rows; output: (M, N) float32.\nvoid inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M);\n#ifdef __cplusplus\n}\n#endif\n"
+  },
+  {
+   "path": "gemm.cpp",
+   "content": "// Binding harness: forwards straight to inner_gemm (no derived dims needed).\n// ABI: armbench_entry_gemm(A*, output*, B_blocks*, M)\n#include \"gemm.h\"\nusing namespace gemm_def;\n\nextern \"C\" int armbench_entry_gemm(const uint16_t* A, float* output,\n                                    const uint8_t* B_blocks, int M)\n{\n    inner_gemm(A, output, B_blocks, M);\n    return 0;\n}\n"
+  },
+  {
+   "path": "kernel.cpp",
+   "content": "// Q6_K x Q8_K gemm, AArch64 i8mm (smmla) 2x2-tile kernel for K=2560 (K_blk=10), N=248320 (B streams\n// from DRAM, ~521 MB).  FINAL (v18 = re-run of v17): 2.248x time / 2.252x cycle vs baseline-llamacpp-arm.\n// Block (210 B): ql[128] (low nibbles), qh[64] (2 high bits x4 per byte), scales[16] int8, d fp16.\n// Decode: one TBL per qh nibble-index serves TWO groups: T[x] = (nib(x>>2)<<4) | nib(x), nib(v)=((v&3)-2)&0xF\n//   g0 = SLI(zA, oA, 4)  g1 = BIT(oA, zB, 0x0F)  g2 = SLI(USHR(zA,4), oB, 4)  g3 = SRI(oB, zB, 4)\n//   -> signed (value-32) bytes directly: smmla/sdot signed x signed, no min term.\n// Scales: sign-extended with SVE LD1SB (load pipes only, no V uop).  Tile coefficient vectors\n// [s c0, s c0, s c1, s c1] are built once per block-pair by 4 TBL2 into a 64 B scratch and loaded\n// per chunk with LD1SB.S (1 vector MLA per sub-block per row).  Tiles R<8 keep one accumulator\n// chain per row in registers; a fake pointer dependency on the previous chunk's accumulators stops\n// clang from hoisting chunks and spilling.  M=1: sdot per sub-block + lane MLA, decode as one asm block.\n// Prefetch: L1 STRM 2/2/1 pairs ahead (rr1/rr2/rr4) + L2 KEEP 8 pairs ahead; mv2: L1 KEEP 3 cols + L2 16 cols.\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <arm_sve.h>\n#include <arm_neon_sve_bridge.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n#define BLK 210\n#define OFF_QH 128\n#define OFF_SC 192\n#define OFF_D 208\n#define OPAQUE(v) __asm__(\"\" : \"+w\"(v))\n\n#ifndef KS16\n#define KS16 5\n#endif\n#ifndef KS8\n#define KS8 10\n#endif\n#ifndef KS4\n#define KS4 10\n#endif\n#ifndef KS2\n#define KS2 10\n#endif\n#ifndef KS1\n#define KS1 10\n#endif\n#ifndef MVPF\n#define MVPF 3\n#endif\n#ifndef MV2PF\n#define MV2PF 16\n#endif\n#ifndef PF2NP\n#define PF2NP 8\n#endif\n#ifndef NB\n#define NB 32\n#endif\n#ifndef MEMACC_R\n#define MEMACC_R 8\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f), vmin = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(f0, f1));\n        vmin = vminq_f32(vmin, vminq_f32(f0, f1));\n    }\n    const float mx = vmaxvq_f32(vmax), mn = vminvq_f32(vmin);\n    const float maxv = (mx >= -mn) ? mx : mn;\n    if (maxv == 0.f) {\n        memset(q8, 0, K);\n        *da = 0.f;\n        return;\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n        int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n        int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n        vst1_s8(q8 + l, vqmovn_s16(n16));\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            const int h = c >> 1, p = c & 1;\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int lo = i * 256 + h * 128 + p * 32;\n            const int hi = lo + 64;\n            for (int t = 0; t < 2; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(q0 + lo + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(q1 + lo + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n            for (int t = 0; t < 2; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(q0 + hi + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(q1 + hi + 16 * t));\n                vst1q_s8(dst + 64 + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 64 + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\n#define NIB(v) ((((v) & 3) - 2) & 0xF)\n#define TE(x) (uint8_t)((NIB((x) >> 2) << 4) | NIB(x))\nstatic const uint8x16_t kT = {TE(0),TE(1),TE(2),TE(3),TE(4),TE(5),TE(6),TE(7),TE(8),TE(9),TE(10),TE(11),TE(12),TE(13),TE(14),TE(15)};\n#define CQ(q) {4*(q),4*(q),16+4*(q),16+4*(q), 4*(q)+1,4*(q)+1,16+4*(q)+1,16+4*(q)+1, 4*(q)+2,4*(q)+2,16+4*(q)+2,16+4*(q)+2, 4*(q)+3,4*(q)+3,16+4*(q)+3,16+4*(q)+3}\nstatic const uint8x16_t kCQ[4] = {CQ(0), CQ(1), CQ(2), CQ(3)};\n\nKFN int32x4_t ld4s8(const void* p) {\n    return svget_neonq_s32(svld1sb_s32(svptrue_b32(), (const int8_t*)p));\n}\nKFN void ld_scales(const uint8_t* p, int32x4_t* S) {\n    S[0] = ld4s8(p); S[1] = ld4s8(p + 4); S[2] = ld4s8(p + 8); S[3] = ld4s8(p + 12);\n}\n\nKFN uint8x16_t bit_lo(uint8x16_t o, uint8x16_t z, uint8x16_t m0F) {\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(o) : \"w\"(z), \"w\"(m0F));\n    return o;\n}\nKFN uint8x16_t dec_g0(uint8x16_t zA, uint8x16_t oA) { return vsliq_n_u8(zA, oA, 4); }\nKFN uint8x16_t dec_g1(uint8x16_t zB, uint8x16_t oA, uint8x16_t m4) { return bit_lo(oA, zB, m4); }\nKFN uint8x16_t dec_g2(uint8x16_t zA, uint8x16_t oB) { return vsliq_n_u8(vshrq_n_u8(zA, 4), oB, 4); }\nKFN uint8x16_t dec_g3(uint8x16_t zB, uint8x16_t oB) { return vsriq_n_u8(oB, zB, 4); }\n\nKFN void dec_half(uint8x16_t A0, uint8x16_t A1, uint8x16_t B0, uint8x16_t B1, uint8x16_t Q0, uint8x16_t Q1,\n                  const uint8x16_t m4, const uint8x16_t T, uint8x16_t* w) {\n    uint8x16_t t0, t1, oA0, oA1, oB0, oB1, w4, w5;\n    __asm__(\n        \"and   %[t0].16b, %[Q0].16b, %[m4].16b\\n\\t\"\n        \"ushr  %[Q0].16b, %[Q0].16b, #4\\n\\t\"\n        \"and   %[t1].16b, %[Q1].16b, %[m4].16b\\n\\t\"\n        \"ushr  %[Q1].16b, %[Q1].16b, #4\\n\\t\"\n        \"tbl   %[oA0].16b, {%[T].16b}, %[t0].16b\\n\\t\"\n        \"tbl   %[oB0].16b, {%[T].16b}, %[Q0].16b\\n\\t\"\n        \"tbl   %[oA1].16b, {%[T].16b}, %[t1].16b\\n\\t\"\n        \"tbl   %[oB1].16b, {%[T].16b}, %[Q1].16b\\n\\t\"\n        \"ushr  %[w4].16b, %[A0].16b, #4\\n\\t\"\n        \"ushr  %[w5].16b, %[A1].16b, #4\\n\\t\"\n        \"sli   %[w4].16b, %[oB0].16b, #4\\n\\t\"\n        \"sli   %[w5].16b, %[oB1].16b, #4\\n\\t\"\n        \"sri   %[oB0].16b, %[B0].16b, #4\\n\\t\"\n        \"sri   %[oB1].16b, %[B1].16b, #4\\n\\t\"\n        \"sli   %[A0].16b, %[oA0].16b, #4\\n\\t\"\n        \"sli   %[A1].16b, %[oA1].16b, #4\\n\\t\"\n        \"bit   %[oA0].16b, %[B0].16b, %[m4].16b\\n\\t\"\n        \"bit   %[oA1].16b, %[B1].16b, %[m4].16b\\n\\t\"\n        : [A0]\"+w\"(A0), [A1]\"+w\"(A1), [Q0]\"+w\"(Q0), [Q1]\"+w\"(Q1),\n          [t0]\"=&w\"(t0), [t1]\"=&w\"(t1), [oA0]\"=&w\"(oA0), [oA1]\"=&w\"(oA1),\n          [oB0]\"=&w\"(oB0), [oB1]\"=&w\"(oB1), [w4]\"=&w\"(w4), [w5]\"=&w\"(w5)\n        : [B0]\"w\"(B0), [B1]\"w\"(B1), [m4]\"w\"(m4), [T]\"w\"(T));\n    w[0] = A0; w[1] = A1; w[2] = oA0; w[3] = oA1; w[4] = w4; w[5] = w5; w[6] = oB0; w[7] = oB1;\n}\n\nKFN int32x4_t mm(int32x4_t acc, uint8x16_t w, const int8_t* a) {\n    return vmmlaq_s32(acc, vreinterpretq_s8_u8(w), vld1q_s8(a));\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); PF((p) + 192); } while (0)\n#define PFK(p) __builtin_prefetch((const void*)(p), 0, 3)\n#define PFK_BLK(p) do { PFK(p); PFK((p) + 64); PFK((p) + 128); PFK((p) + 192); } while (0)\n#define PF2(p) __builtin_prefetch((const void*)(p), 0, 2)\n#define PF2_BLK(p) do { PF2(p); PF2((p) + 64); PF2((p) + 128); PF2((p) + 192); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\nstruct TileState {\n    const uint8_t* blk0; const uint8_t* blk1;\n    uint8x16_t oA[4], oB[4];\n    const int8_t* apc;\n    const int8_t* csc;\n};\n\ntemplate <int R> KFN const int8_t* dep_ptr(const int8_t* p, const int32x4_t* acc) {\n    if (R >= 1) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[0]));\n    if (R >= 2) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[1]));\n    if (R >= 3) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[2]));\n    if (R >= 4) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[3]));\n    return p;\n}\n\ntemplate <int R, int H, int P>\nKFN void do_chunk(const TileState& ts, int32x4_t* acc, int32x4_t (*accb)[R],\n                  const int32x4_t zero32, const uint8x16_t m4) {\n    constexpr int c = 2 * H + P;\n    constexpr int j0 = H * 8 + 2 * P;\n    constexpr bool MEMACC = (R >= MEMACC_R);\n    const uint8_t* q0 = ts.blk0 + H * 64 + P * 32;\n    const uint8_t* q1 = ts.blk1 + H * 64 + P * 32;\n    uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0));\n    uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 16));\n    uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1));\n    uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 16));\n    uint8x16_t z[4];\n    z[0] = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n    z[1] = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n    z[2] = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n    z[3] = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n    uint8x16_t l[4], hh[4];\n    for (int t = 0; t < 4; ++t) {\n        if (P == 0) { hh[t] = dec_g2(z[t], ts.oB[t]); l[t] = dec_g0(z[t], ts.oA[t]); }\n        else        { hh[t] = dec_g3(z[t], ts.oB[t]); l[t] = dec_g1(z[t], ts.oA[t], m4); }\n    }\n    const int8_t* apr = ts.apc + (size_t)c * (R * 128);\n    int32x4_t cL0 = ld4s8(ts.csc + 4 * j0), cL1 = ld4s8(ts.csc + 4 * (j0 + 1));\n    int32x4_t cH0 = ld4s8(ts.csc + 4 * (j0 + 4)), cH1 = ld4s8(ts.csc + 4 * (j0 + 5));\n    if (MEMACC) {\n        const int8_t* ap = apr;\n        int32x4_t* ab = accb[c & 1];\n#pragma clang loop unroll(disable)\n        for (int r = 0; r < R; ++r, ap += 128) {\n            int32x4_t uL0 = mm(mm(zero32, l[0], ap + 0), l[1], ap + 16);\n            int32x4_t uL1 = mm(mm(zero32, l[2], ap + 32), l[3], ap + 48);\n            int32x4_t uH0 = mm(mm(zero32, hh[0], ap + 64), hh[1], ap + 80);\n            int32x4_t uH1 = mm(mm(zero32, hh[2], ap + 96), hh[3], ap + 112);\n            int32x4_t a;\n            if (c < 2) {\n                a = vmulq_s32(uL0, cL0);\n            } else {\n                a = ab[r]; OPAQUE(a);\n                a = vmlaq_s32(a, uL0, cL0);\n            }\n            a = vmlaq_s32(a, uL1, cL1);\n            a = vmlaq_s32(a, uH0, cH0);\n            a = vmlaq_s32(a, uH1, cH1);\n            ab[r] = a;\n        }\n    } else {\n        const int8_t* ap0 = (c == 0) ? apr : dep_ptr<R>(apr, acc);\n        for (int r = 0; r < R; ++r) {\n            const int8_t* ap = ap0 + r * 128;\n            int32x4_t uL0 = mm(mm(zero32, l[0], ap + 0), l[1], ap + 16);\n            int32x4_t uL1 = mm(mm(zero32, l[2], ap + 32), l[3], ap + 48);\n            int32x4_t uH0 = mm(mm(zero32, hh[0], ap + 64), hh[1], ap + 80);\n            int32x4_t uH1 = mm(mm(zero32, hh[2], ap + 96), hh[3], ap + 112);\n            int32x4_t a = (c == 0) ? vmulq_s32(uL0, cL0) : vmlaq_s32(acc[r], uL0, cL0);\n            a = vmlaq_s32(a, uL1, cL1);\n            a = vmlaq_s32(a, uH0, cH0);\n            acc[r] = vmlaq_s32(a, uH1, cH1);\n        }\n    }\n}\n\ntemplate <int H>\nKFN void prep_half(TileState& ts, const uint8x16_t m4) {\n    uint64x2_t q0a = vreinterpretq_u64_u8(vld1q_u8(ts.blk0 + OFF_QH + H * 32));\n    uint64x2_t q0b = vreinterpretq_u64_u8(vld1q_u8(ts.blk0 + OFF_QH + H * 32 + 16));\n    uint64x2_t q1a = vreinterpretq_u64_u8(vld1q_u8(ts.blk1 + OFF_QH + H * 32));\n    uint64x2_t q1b = vreinterpretq_u64_u8(vld1q_u8(ts.blk1 + OFF_QH + H * 32 + 16));\n    uint8x16_t zq[4];\n    zq[0] = vreinterpretq_u8_u64(vzip1q_u64(q0a, q1a));\n    zq[1] = vreinterpretq_u8_u64(vzip2q_u64(q0a, q1a));\n    zq[2] = vreinterpretq_u8_u64(vzip1q_u64(q0b, q1b));\n    zq[3] = vreinterpretq_u8_u64(vzip2q_u64(q0b, q1b));\n    for (int t = 0; t < 4; ++t) {\n        ts.oA[t] = vqtbl1q_u8(kT, vandq_u8(zq[t], m4));\n        ts.oB[t] = vqtbl1q_u8(kT, vshrq_n_u8(zq[t], 4));\n    }\n}\n\ntemplate <int R, int PFNP>\nKFN void run_rows(const int8_t* gp, const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    constexpr bool MEMACC = (R >= MEMACC_R);\n    alignas(64) float obuf[2 * R * 2 * NB];\n    alignas(16) int32x4_t accb[2][R];\n    alignas(16) int8_t csc[64];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf0 = b0 + (size_t)(2 * PFNP) * K_bytes;\n        const uint8_t* pf1 = pf0 + K_bytes;\n        const uint8_t* pg0 = b0 + (size_t)(2 * PF2NP) * K_bytes;\n        const uint8_t* pg1 = pg0 + K_bytes;\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i) {\n            TileState ts;\n            ts.blk0 = b0 + i * BLK;\n            ts.blk1 = b1 + i * BLK;\n            ts.csc = csc;\n            PF_BLK(pf0 + i * BLK);\n            PF_BLK(pf1 + i * BLK);\n            if (PF2NP > 0) { PF2_BLK(pg0 + i * BLK); PF2_BLK(pg1 + i * BLK); }\n            {\n                uint8x16x2_t sct;\n                sct.val[0] = vld1q_u8(ts.blk0 + OFF_SC);\n                sct.val[1] = vld1q_u8(ts.blk1 + OFF_SC);\n                for (int q = 0; q < 4; ++q) vst1q_u8((uint8_t*)csc + 16 * q, vqtbl2q_u8(sct, kCQ[q]));\n            }\n            uint16_t w0, w1; memcpy(&w0, ts.blk0 + OFF_D, 2); memcpy(&w1, ts.blk1 + OFF_D, 2);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 16))));\n            float32x4_t dvec = vzip1q_f32(v, v);\n            ts.apc = gp + (size_t)i * (4 * R * 128);\n\n            int32x4_t acc[R];\n            prep_half<0>(ts, m4);\n            do_chunk<R, 0, 0>(ts, acc, accb, zero32, m4);\n            do_chunk<R, 0, 1>(ts, acc, accb, zero32, m4);\n            prep_half<1>(ts, m4);\n            do_chunk<R, 1, 0>(ts, acc, accb, zero32, m4);\n            do_chunk<R, 1, 1>(ts, acc, accb, zero32, m4);\n\n            for (int r = 0; r < R; ++r) {\n                int32x4_t a = MEMACC ? vaddq_s32(accb[0][r], accb[1][r]) : acc[r];\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\n#define MV_SUB(jj, W, Y, SV, LANE) do { \\\n    int32x4_t dd = vdotq_s32(zero32, vreinterpretq_s8_u8(W), Y); \\\n    a##jj = vmlaq_laneq_s32(a##jj, dd, SV, LANE); } while (0)\n#define MV_SUB0(jj, W, Y, SV, LANE) do { \\\n    int32x4_t dd = vdotq_s32(zero32, vreinterpretq_s8_u8(W), Y); \\\n    a##jj = vmulq_laneq_s32(dd, SV, LANE); } while (0)\n\nKFN void mv_col(const uint8_t* blk, const int8_t* y, int32x4_t& tot, const int32x4_t zero32, const uint8x16_t m4) {\n    int32x4_t S[4];\n    ld_scales(blk + OFF_SC, S);\n    int32x4_t a0, a1, a2, a3;\n#pragma clang loop unroll(full)\n    for (int h = 0; h < 2; ++h) {\n        const uint8_t* ql = blk + h * 64;\n        const uint8_t* qh = blk + OFF_QH + h * 32;\n        uint8x16_t A0 = vld1q_u8(ql), A1 = vld1q_u8(ql + 16), B0 = vld1q_u8(ql + 32), B1 = vld1q_u8(ql + 48);\n        uint8x16_t Q0 = vld1q_u8(qh), Q1 = vld1q_u8(qh + 16);\n        const int8_t* yy = y + h * 128;\n        int8x16_t y0 = vld1q_s8(yy), y1 = vld1q_s8(yy + 16), y2 = vld1q_s8(yy + 32), y3 = vld1q_s8(yy + 48);\n        int8x16_t y4 = vld1q_s8(yy + 64), y5 = vld1q_s8(yy + 80), y6 = vld1q_s8(yy + 96), y7 = vld1q_s8(yy + 112);\n        uint8x16_t w[8];\n        dec_half(A0, A1, B0, B1, Q0, Q1, m4, kT, w);\n        if (h == 0) {\n            MV_SUB0(0, w[0], y0, S[0], 0); MV_SUB0(1, w[1], y1, S[0], 1); MV_SUB0(2, w[2], y2, S[0], 2); MV_SUB0(3, w[3], y3, S[0], 3);\n            MV_SUB(0, w[4], y4, S[1], 0); MV_SUB(1, w[5], y5, S[1], 1); MV_SUB(2, w[6], y6, S[1], 2); MV_SUB(3, w[7], y7, S[1], 3);\n        } else {\n            MV_SUB(0, w[0], y0, S[2], 0); MV_SUB(1, w[1], y1, S[2], 1); MV_SUB(2, w[2], y2, S[2], 2); MV_SUB(3, w[3], y3, S[2], 3);\n            MV_SUB(0, w[4], y4, S[3], 0); MV_SUB(1, w[5], y5, S[3], 1); MV_SUB(2, w[6], y6, S[3], 2); MV_SUB(3, w[7], y7, S[3], 3);\n        }\n    }\n    tot = vaddq_s32(vaddq_s32(a0, a1), vaddq_s32(a2, a3));\n}\n\nKFN void run_mv2(const int8_t* q8, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i) {\n            const int8_t* y = q8 + i * 256;\n            const uint8_t* blk0 = b0 + i * BLK;\n            const uint8_t* blk1 = b1 + i * BLK;\n            PFK_BLK(blk0 + MVPF * K_bytes);\n            PFK_BLK(blk1 + MVPF * K_bytes);\n            if (MV2PF > 0) { PF2_BLK(blk0 + MV2PF * K_bytes); PF2_BLK(blk1 + MV2PF * K_bytes); }\n            uint16_t w0, w1; memcpy(&w0, blk0 + OFF_D, 2); memcpy(&w1, blk1 + OFF_D, 2);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 16))));\n            int32x4_t t0, t1;\n            mv_col(blk0, y, t0, zero32, m4);\n            mv_col(blk1, y, t1, zero32, m4);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(t0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(t1), v, 1);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        vst1_f32(out + 2 * np, vmul_n_f32(s2, da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, PFNP>(gp, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr16, 16, 1)\nTILE_ENTRY(rr8, 8, 1)\nTILE_ENTRY(rr4, 4, 1)\nTILE_ENTRY(rr2, 2, 2)\nTILE_ENTRY(rr1, 1, 2)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8,\n    float da, const uint8_t* B, float* out) { run_mv2(q8, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        float da;\n        quantize_row(A, q8[0], &da);\n        mv2(q8[0], da, B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 16 ? 16 : (rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1)));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 16 ? KS16 : (R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1)));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 16)     rr16(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 8) rr8(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+  }
+ ],
+ "provenance": {
+  "run": "e2e-fable-lane1",
+  "submitted_version": "v18.cpp",
+  "time_speedup": 2.2496635860168706,
+  "evaluations": 18,
+  "server_calls": 41
+ }
+}

solutions/llama.cpp/claude-code-claude-fable-5-1-gatev2/gemm/gemm_ggml_q6_K_n2560_k9216.json

@@ -0,0 +1,46 @@
+{
+ "name": "claude-code-claude-fable-5-1-gatev2_gemm_ggml_q6_K_n2560_k9216",
+ "definition": "gemm_ggml_q6_K_n2560_k9216",
+ "dataset": "llama.cpp",
+ "author": "claude-code-claude-fable-5-1-gatev2",
+ "description": "Claude Code + claude-fable-5-1 (sve2, 40/50 budget, E2E Qwen3.5-4B run 2026-09-21) submitted kernel v17.cpp for gemm_ggml_q6_K_n2560_k9216; harness files from reference-scalar. Harness speedup vs baseline-llamacpp-arm on c8g.xlarge: 2.741x.",
+ "spec": {
+  "language": "cpp",
+  "target_hardware": [
+   "graviton4",
+   "aarch64-sve2"
+  ],
+  "entry_point": "gemm.cpp::armbench_entry_gemm",
+  "dependencies": [],
+  "isa_features": [
+   "sve2"
+  ],
+  "compile_flags": [
+   "-O3",
+   "-march=armv9-a+sve2",
+   "-std=c++14"
+  ],
+  "link_flags": []
+ },
+ "sources": [
+  {
+   "path": "gemm.h",
+   "content": "#pragma once\n#include <cstdint>\n\n// Per-definition constants for this gemm Q6_K (weight-only, ggml packed\n// layout) specialisation.\n// C[m, n] = sum_k A[m, k] * B[n, k]  (B is the [N, K] \"weight\" matrix, transposed)\n// A is a raw bf16 bit pattern (uint16_t) -- activations stay at the bf16\n// baseline tier (real GGML never stores activations statically in a\n// k-quant format either -- see kernel.cpp for the dynamic quantization this\n// implies).\n// B is ggml's real block_q6_K layout: K/256 consecutive 210-byte super-blocks\n// per row (K_bytes = K/256 * 210), each\n//   struct block_q6_K {\n//     uint8_t ql[128];    // [0:128]   low 4 bits: for 128-element half h (0..1)\n//                         //   and l in 0..31, ql[h*64+l] = elem h*128+l (low\n//                         //   nibble) | elem h*128+64+l (high nibble);\n//                         //   ql[h*64+32+l] = elem h*128+32+l (low) | elem\n//                         //   h*128+96+l (high)\n//     uint8_t qh[64];     // [128:192] high 2 bits: qh[h*32+l] bits 0-1, 2-3,\n//                         //   4-5, 6-7 = elems h*128 + {l, 32+l, 64+l, 96+l}\n//     int8_t  scales[16]; // [192:208] one signed scale per 16-element sub-block\n//     fp16    d;          // [208:210] super-block scale\n//   };\n// Sub-block j (16 elements) dequantizes as w = d*scales[j]*(q - 32), q in 0..63.\n// Output accumulates/returns in fp32.\nnamespace gemm_def {\nconstexpr int N = 2560;\nconstexpr int K = 9216;\nconstexpr int K_blk = 36;\nconstexpr int K_bytes = 7560;\n} // namespace gemm_def\n\n#ifdef __cplusplus\nextern \"C\" {\n#endif\n// LLM target: implement this in kernel.cpp.\n// M is the only var dim. A: (M, K) bf16; B_blocks: (N, K_bytes) uint8 ggml\n// block_q6_K rows; output: (M, N) float32.\nvoid inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M);\n#ifdef __cplusplus\n}\n#endif\n"
+  },
+  {
+   "path": "gemm.cpp",
+   "content": "// Binding harness: forwards straight to inner_gemm (no derived dims needed).\n// ABI: armbench_entry_gemm(A*, output*, B_blocks*, M)\n#include \"gemm.h\"\nusing namespace gemm_def;\n\nextern \"C\" int armbench_entry_gemm(const uint16_t* A, float* output,\n                                    const uint8_t* B_blocks, int M)\n{\n    inner_gemm(A, output, B_blocks, M);\n    return 0;\n}\n"
+  },
+  {
+   "path": "kernel.cpp",
+   "content": "// Q6_K x Q8_K gemm, AArch64 i8mm (smmla) 2x2-tile kernel for K=9216 (K_blk=36), N=2560 (B = 19.4 MB, L3).\n// v17: v16 with PFNP=1 for rr1/rr2 (L1 prefetch one column pair ahead for all tiles).\n#include \"gemm.h\"\n#include <arm_neon.h>\n#include <arm_sve.h>\n#include <arm_neon_sve_bridge.h>\n#include <cstdint>\n#include <cstring>\n#include <cmath>\n#include <vector>\nusing namespace gemm_def;\n\n#define KFN __attribute__((target(\"i8mm\"))) inline\n#define BLK 210\n#define OFF_QH 128\n#define OFF_SC 192\n#define OFF_D 208\n#define OPAQUE(v) __asm__(\"\" : \"+w\"(v))\n#define PIN(p) __asm__(\"\" : \"+r\"(p))\n\n#ifndef KS16\n#define KS16 4\n#endif\n#ifndef KS8\n#define KS8 9\n#endif\n#ifndef KS4\n#define KS4 18\n#endif\n#ifndef KS2\n#define KS2 36\n#endif\n#ifndef KS1\n#define KS1 36\n#endif\n#ifndef MVPF\n#define MVPF 3\n#endif\n#ifndef MV2PF\n#define MV2PF 0\n#endif\n#ifndef PF2NP\n#define PF2NP 0\n#endif\n#ifndef TILE_PF\n#define TILE_PF 1\n#endif\n#ifndef NB\n#define NB 32\n#endif\n#ifndef MEMACC_R\n#define MEMACC_R 8\n#endif\n#ifndef NCH1\n#define NCH1 1\n#endif\n#ifndef NCH2\n#define NCH2 1\n#endif\n#ifndef NCH4\n#define NCH4 1\n#endif\n\nnamespace {\n\nKFN void quantize_row(const uint16_t* x, int8_t* q8, float* da) {\n    float32x4_t vmax = vdupq_n_f32(0.f), vmin = vdupq_n_f32(0.f);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        vmax = vmaxq_f32(vmax, vmaxq_f32(f0, f1));\n        vmin = vminq_f32(vmin, vminq_f32(f0, f1));\n    }\n    const float mx = vmaxvq_f32(vmax), mn = vminvq_f32(vmin);\n    const float maxv = (mx >= -mn) ? mx : mn;\n    if (maxv == 0.f) {\n        memset(q8, 0, K);\n        *da = 0.f;\n        return;\n    }\n    const float iscale = -127.f / maxv;\n    const float32x4_t vis = vdupq_n_f32(iscale);\n    const int32x4_t v127 = vdupq_n_s32(127);\n    for (int l = 0; l < K; l += 8) {\n        uint16x8_t h = vld1q_u16(x + l);\n        float32x4_t f0 = vreinterpretq_f32_u32(vshll_n_u16(vget_low_u16(h), 16));\n        float32x4_t f1 = vreinterpretq_f32_u32(vshll_high_n_u16(h, 16));\n        int32x4_t i0 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f0, vis)), v127);\n        int32x4_t i1 = vminq_s32(vcvtaq_s32_f32(vmulq_f32(f1, vis)), v127);\n        int16x8_t n16 = vcombine_s16(vqmovn_s32(i0), vqmovn_s32(i1));\n        vst1_s8(q8 + l, vqmovn_s16(n16));\n    }\n    *da = 1.0f / iscale;\n}\n\nKFN void pack_pair_group(const int8_t* q0, const int8_t* q1, int8_t* gbase, int R, int r) {\n    for (int i = 0; i < K_blk; ++i) {\n        for (int c = 0; c < 4; ++c) {\n            const int h = c >> 1, p = c & 1;\n            int8_t* dst = gbase + ((size_t)(i * 4 + c) * R + r) * 128;\n            const int lo = i * 256 + h * 128 + p * 32;\n            const int hi = lo + 64;\n            for (int t = 0; t < 2; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(q0 + lo + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(q1 + lo + 16 * t));\n                vst1q_s8(dst + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n            for (int t = 0; t < 2; ++t) {\n                int64x2_t a = vreinterpretq_s64_s8(vld1q_s8(q0 + hi + 16 * t));\n                int64x2_t b = vreinterpretq_s64_s8(vld1q_s8(q1 + hi + 16 * t));\n                vst1q_s8(dst + 64 + 32 * t,      vreinterpretq_s8_s64(vzip1q_s64(a, b)));\n                vst1q_s8(dst + 64 + 32 * t + 16, vreinterpretq_s8_s64(vzip2q_s64(a, b)));\n            }\n        }\n    }\n}\n\n#define NIB(v) ((((v) & 3) - 2) & 0xF)\n#define TE(x) (uint8_t)((NIB((x) >> 2) << 4) | NIB(x))\nstatic const uint8x16_t kT = {TE(0),TE(1),TE(2),TE(3),TE(4),TE(5),TE(6),TE(7),TE(8),TE(9),TE(10),TE(11),TE(12),TE(13),TE(14),TE(15)};\n#define CQ(q) {4*(q),4*(q),16+4*(q),16+4*(q), 4*(q)+1,4*(q)+1,16+4*(q)+1,16+4*(q)+1, 4*(q)+2,4*(q)+2,16+4*(q)+2,16+4*(q)+2, 4*(q)+3,4*(q)+3,16+4*(q)+3,16+4*(q)+3}\nstatic const uint8x16_t kCQ[4] = {CQ(0), CQ(1), CQ(2), CQ(3)};\n\nKFN int32x4_t ld4s8(const void* p) {\n    return svget_neonq_s32(svld1sb_s32(svptrue_b32(), (const int8_t*)p));\n}\nKFN void ld_scales(const uint8_t* p, int32x4_t* S) {\n    S[0] = ld4s8(p); S[1] = ld4s8(p + 4); S[2] = ld4s8(p + 8); S[3] = ld4s8(p + 12);\n}\n\nKFN uint8x16_t bit_lo(uint8x16_t o, uint8x16_t z, uint8x16_t m0F) {\n    __asm__(\"bit %0.16b, %1.16b, %2.16b\" : \"+w\"(o) : \"w\"(z), \"w\"(m0F));\n    return o;\n}\nKFN uint8x16_t dec_g0(uint8x16_t zA, uint8x16_t oA) { return vsliq_n_u8(zA, oA, 4); }\nKFN uint8x16_t dec_g1(uint8x16_t zB, uint8x16_t oA, uint8x16_t m4) { return bit_lo(oA, zB, m4); }\nKFN uint8x16_t dec_g2(uint8x16_t zA, uint8x16_t oB) { return vsliq_n_u8(vshrq_n_u8(zA, 4), oB, 4); }\nKFN uint8x16_t dec_g3(uint8x16_t zB, uint8x16_t oB) { return vsriq_n_u8(oB, zB, 4); }\n\nKFN void dec_half(uint8x16_t A0, uint8x16_t A1, uint8x16_t B0, uint8x16_t B1, uint8x16_t Q0, uint8x16_t Q1,\n                  const uint8x16_t m4, const uint8x16_t T, uint8x16_t* w) {\n    uint8x16_t t0, t1, oA0, oA1, oB0, oB1, w4, w5;\n    __asm__(\n        \"and   %[t0].16b, %[Q0].16b, %[m4].16b\\n\\t\"\n        \"ushr  %[Q0].16b, %[Q0].16b, #4\\n\\t\"\n        \"and   %[t1].16b, %[Q1].16b, %[m4].16b\\n\\t\"\n        \"ushr  %[Q1].16b, %[Q1].16b, #4\\n\\t\"\n        \"tbl   %[oA0].16b, {%[T].16b}, %[t0].16b\\n\\t\"\n        \"tbl   %[oB0].16b, {%[T].16b}, %[Q0].16b\\n\\t\"\n        \"tbl   %[oA1].16b, {%[T].16b}, %[t1].16b\\n\\t\"\n        \"tbl   %[oB1].16b, {%[T].16b}, %[Q1].16b\\n\\t\"\n        \"ushr  %[w4].16b, %[A0].16b, #4\\n\\t\"\n        \"ushr  %[w5].16b, %[A1].16b, #4\\n\\t\"\n        \"sli   %[w4].16b, %[oB0].16b, #4\\n\\t\"\n        \"sli   %[w5].16b, %[oB1].16b, #4\\n\\t\"\n        \"sri   %[oB0].16b, %[B0].16b, #4\\n\\t\"\n        \"sri   %[oB1].16b, %[B1].16b, #4\\n\\t\"\n        \"sli   %[A0].16b, %[oA0].16b, #4\\n\\t\"\n        \"sli   %[A1].16b, %[oA1].16b, #4\\n\\t\"\n        \"bit   %[oA0].16b, %[B0].16b, %[m4].16b\\n\\t\"\n        \"bit   %[oA1].16b, %[B1].16b, %[m4].16b\\n\\t\"\n        : [A0]\"+w\"(A0), [A1]\"+w\"(A1), [Q0]\"+w\"(Q0), [Q1]\"+w\"(Q1),\n          [t0]\"=&w\"(t0), [t1]\"=&w\"(t1), [oA0]\"=&w\"(oA0), [oA1]\"=&w\"(oA1),\n          [oB0]\"=&w\"(oB0), [oB1]\"=&w\"(oB1), [w4]\"=&w\"(w4), [w5]\"=&w\"(w5)\n        : [B0]\"w\"(B0), [B1]\"w\"(B1), [m4]\"w\"(m4), [T]\"w\"(T));\n    w[0] = A0; w[1] = A1; w[2] = oA0; w[3] = oA1; w[4] = w4; w[5] = w5; w[6] = oB0; w[7] = oB1;\n}\n\nKFN int32x4_t mm(int32x4_t acc, uint8x16_t w, const int8_t* a) {\n    return vmmlaq_s32(acc, vreinterpretq_s8_u8(w), vld1q_s8(a));\n}\n\n#define PF(p) __builtin_prefetch((const void*)(p), 0, 0)\n#define PF_BLK(p) do { PF(p); PF((p) + 64); PF((p) + 128); PF((p) + 192); } while (0)\n#define PFK(p) __builtin_prefetch((const void*)(p), 0, 3)\n#define PFK_BLK(p) do { PFK(p); PFK((p) + 64); PFK((p) + 128); PFK((p) + 192); } while (0)\n#define PF2(p) __builtin_prefetch((const void*)(p), 0, 2)\n#define PF2_BLK(p) do { PF2(p); PF2((p) + 64); PF2((p) + 128); PF2((p) + 192); } while (0)\n\ntemplate <int R>\nKFN void flush_obuf(const float* obuf, float* out, int m_valid, int np0, int accum) {\n    for (int m = 0; m < 2 * R && m < m_valid; ++m) {\n        const float* src = obuf + (size_t)m * (2 * NB);\n        float* dst = out + (size_t)m * N + 2 * np0;\n        if (accum) {\n            for (int j = 0; j < 2 * NB; j += 4) vst1q_f32(dst + j, vaddq_f32(vld1q_f32(dst + j), vld1q_f32(src + j)));\n        } else {\n            for (int j = 0; j < 2 * NB; j += 4) {\n                float32x4_t vv = vld1q_f32(src + j);\n                __builtin_nontemporal_store(vv, (float32x4_t*)(dst + j));\n            }\n        }\n    }\n}\n\nstruct TileState {\n    const uint8_t* blk0; const uint8_t* blk1;\n    uint8x16_t oA[4], oB[4];\n    const int8_t* apc;\n    const int8_t* csc;\n};\n\ntemplate <int R> KFN const int8_t* dep_ptr(const int8_t* p, const int32x4_t* acc) {\n    if (R >= 1) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[0]));\n    if (R >= 2) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[1]));\n    if (R >= 3) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[2]));\n    if (R >= 4) __asm__(\"\" : \"+r\"(p) : \"w\"(acc[3]));\n    return p;\n}\n\ntemplate <int R> struct Chains { static constexpr int n = (R == 1) ? NCH1 : (R == 2) ? NCH2 : (R == 4) ? NCH4 : 1; };\n\ntemplate <int R, int H, int P>\nKFN void do_chunk(const TileState& ts, int32x4_t* acc, int32x4_t (*accb)[R],\n                  const int32x4_t zero32, const uint8x16_t m4) {\n    constexpr int c = 2 * H + P;\n    constexpr int j0 = H * 8 + 2 * P;\n    constexpr bool MEMACC = (R >= MEMACC_R);\n    constexpr int NCH = Chains<R>::n;\n    const uint8_t* q0 = ts.blk0 + H * 64 + P * 32;\n    const uint8_t* q1 = ts.blk1 + H * 64 + P * 32;\n    uint64x2_t r0a = vreinterpretq_u64_u8(vld1q_u8(q0));\n    uint64x2_t r0b = vreinterpretq_u64_u8(vld1q_u8(q0 + 16));\n    uint64x2_t r1a = vreinterpretq_u64_u8(vld1q_u8(q1));\n    uint64x2_t r1b = vreinterpretq_u64_u8(vld1q_u8(q1 + 16));\n    uint8x16_t z[4];\n    z[0] = vreinterpretq_u8_u64(vzip1q_u64(r0a, r1a));\n    z[1] = vreinterpretq_u8_u64(vzip2q_u64(r0a, r1a));\n    z[2] = vreinterpretq_u8_u64(vzip1q_u64(r0b, r1b));\n    z[3] = vreinterpretq_u8_u64(vzip2q_u64(r0b, r1b));\n    uint8x16_t l[4], hh[4];\n    for (int t = 0; t < 4; ++t) {\n        if (P == 0) { hh[t] = dec_g2(z[t], ts.oB[t]); l[t] = dec_g0(z[t], ts.oA[t]); }\n        else        { hh[t] = dec_g3(z[t], ts.oB[t]); l[t] = dec_g1(z[t], ts.oA[t], m4); }\n    }\n    const int8_t* apr = ts.apc + (size_t)c * (R * 128);\n    int32x4_t cL0 = ld4s8(ts.csc + 4 * j0), cL1 = ld4s8(ts.csc + 4 * (j0 + 1));\n    int32x4_t cH0 = ld4s8(ts.csc + 4 * (j0 + 4)), cH1 = ld4s8(ts.csc + 4 * (j0 + 5));\n    if (MEMACC) {\n        const int8_t* ap = apr;\n        int32x4_t* ab = accb[c & 1];\n#pragma clang loop unroll(disable)\n        for (int r = 0; r < R; r += 2, ap += 256) {\n            int32x4_t uL0 = mm(mm(zero32, l[0], ap + 0), l[1], ap + 16);\n            int32x4_t uL1 = mm(mm(zero32, l[2], ap + 32), l[3], ap + 48);\n            int32x4_t uH0 = mm(mm(zero32, hh[0], ap + 64), hh[1], ap + 80);\n            int32x4_t uH1 = mm(mm(zero32, hh[2], ap + 96), hh[3], ap + 112);\n            int32x4_t vL0 = mm(mm(zero32, l[0], ap + 128), l[1], ap + 144);\n            int32x4_t vL1 = mm(mm(zero32, l[2], ap + 160), l[3], ap + 176);\n            int32x4_t vH0 = mm(mm(zero32, hh[0], ap + 192), hh[1], ap + 208);\n            int32x4_t vH1 = mm(mm(zero32, hh[2], ap + 224), hh[3], ap + 240);\n            int32x4_t a, b;\n            if (c < 2) {\n                a = vmulq_s32(uL0, cL0);\n                b = vmulq_s32(vL0, cL0);\n            } else {\n                a = ab[r]; OPAQUE(a);\n                b = ab[r + 1]; OPAQUE(b);\n                a = vmlaq_s32(a, uL0, cL0);\n                b = vmlaq_s32(b, vL0, cL0);\n            }\n            a = vmlaq_s32(a, uL1, cL1);\n            b = vmlaq_s32(b, vL1, cL1);\n            a = vmlaq_s32(a, uH0, cH0);\n            b = vmlaq_s32(b, vH0, cH0);\n            a = vmlaq_s32(a, uH1, cH1);\n            b = vmlaq_s32(b, vH1, cH1);\n            ab[r] = a;\n            ab[r + 1] = b;\n        }\n    } else {\n        int32x4_t* accc = acc + (c % NCH) * R;\n        const int8_t* ap0 = (c < NCH) ? apr : dep_ptr<R>(apr, accc);\n        for (int r = 0; r < R; ++r) {\n            const int8_t* ap = ap0 + r * 128;\n            int32x4_t uL0 = mm(mm(zero32, l[0], ap + 0), l[1], ap + 16);\n            int32x4_t uL1 = mm(mm(zero32, l[2], ap + 32), l[3], ap + 48);\n            int32x4_t uH0 = mm(mm(zero32, hh[0], ap + 64), hh[1], ap + 80);\n            int32x4_t uH1 = mm(mm(zero32, hh[2], ap + 96), hh[3], ap + 112);\n            int32x4_t a = (c < NCH) ? vmulq_s32(uL0, cL0) : vmlaq_s32(accc[r], uL0, cL0);\n            a = vmlaq_s32(a, uL1, cL1);\n            a = vmlaq_s32(a, uH0, cH0);\n            a = vmlaq_s32(a, uH1, cH1);\n            if (NCH > 1) OPAQUE(a);\n            accc[r] = a;\n        }\n    }\n}\n\ntemplate <int H>\nKFN void prep_half(TileState& ts, const uint8x16_t m4) {\n    uint64x2_t q0a = vreinterpretq_u64_u8(vld1q_u8(ts.blk0 + OFF_QH + H * 32));\n    uint64x2_t q0b = vreinterpretq_u64_u8(vld1q_u8(ts.blk0 + OFF_QH + H * 32 + 16));\n    uint64x2_t q1a = vreinterpretq_u64_u8(vld1q_u8(ts.blk1 + OFF_QH + H * 32));\n    uint64x2_t q1b = vreinterpretq_u64_u8(vld1q_u8(ts.blk1 + OFF_QH + H * 32 + 16));\n    uint8x16_t zq[4];\n    zq[0] = vreinterpretq_u8_u64(vzip1q_u64(q0a, q1a));\n    zq[1] = vreinterpretq_u8_u64(vzip2q_u64(q0a, q1a));\n    zq[2] = vreinterpretq_u8_u64(vzip1q_u64(q0b, q1b));\n    zq[3] = vreinterpretq_u8_u64(vzip2q_u64(q0b, q1b));\n    for (int t = 0; t < 4; ++t) {\n        ts.oA[t] = vqtbl1q_u8(kT, vandq_u8(zq[t], m4));\n        ts.oB[t] = vqtbl1q_u8(kT, vshrq_n_u8(zq[t], 4));\n    }\n}\n\ntemplate <int R, int PFNP>\nKFN void run_rows(const int8_t* gp, const float* da, const uint8_t* B, float* out, int m_valid,\n                  int i0, int i1, int accum) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    constexpr bool MEMACC = (R >= MEMACC_R);\n    constexpr int NCH = Chains<R>::n;\n    alignas(64) float obuf[2 * R * 2 * NB];\n    alignas(16) int32x4_t accb[2][R];\n    alignas(64) int8_t cscb[K_blk * 64];\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* b1 = b0 + K_bytes;\n        const uint8_t* pf = b0 + (size_t)(2 * PFNP) * K_bytes + (size_t)i0 * BLK;\n        const uint8_t* pg = b0 + (size_t)(2 * PF2NP) * K_bytes + (size_t)i0 * BLK;\n        const uint8_t* blk0 = b0 + (size_t)i0 * BLK;\n        for (int i = i0; i < i1; ++i) {\n            uint8x16x2_t sct;\n            sct.val[0] = vld1q_u8(b0 + (size_t)i * BLK + OFF_SC);\n            sct.val[1] = vld1q_u8(b1 + (size_t)i * BLK + OFF_SC);\n            uint8_t* dst = (uint8_t*)cscb + (size_t)i * 64;\n            for (int q = 0; q < 4; ++q) vst1q_u8(dst + 16 * q, vqtbl2q_u8(sct, kCQ[q]));\n        }\n        float32x4_t facc[R];\n        for (int r = 0; r < R; ++r) facc[r] = vdupq_n_f32(0.f);\n        for (int i = i0; i < i1; ++i, pf += BLK, pg += BLK, blk0 += BLK) {\n            TileState ts;\n            PIN(blk0);\n            ts.blk0 = blk0;\n            ts.blk1 = blk0 + K_bytes;\n            ts.csc = cscb + (size_t)i * 64;\n            if (TILE_PF) { PIN(pf); PF_BLK(pf); PF_BLK(pf + K_bytes); }\n            if (PF2NP > 0) { PIN(pg); PF2_BLK(pg); PF2_BLK(pg + K_bytes); }\n            uint16_t w0, w1; memcpy(&w0, ts.blk0 + OFF_D, 2); memcpy(&w1, ts.blk1 + OFF_D, 2);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 16))));\n            float32x4_t dvec = vzip1q_f32(v, v);\n            ts.apc = gp + (size_t)i * (4 * R * 128);\n\n            int32x4_t acc[4 * R];\n            prep_half<0>(ts, m4);\n            do_chunk<R, 0, 0>(ts, acc, accb, zero32, m4);\n            do_chunk<R, 0, 1>(ts, acc, accb, zero32, m4);\n            prep_half<1>(ts, m4);\n            do_chunk<R, 1, 0>(ts, acc, accb, zero32, m4);\n            do_chunk<R, 1, 1>(ts, acc, accb, zero32, m4);\n\n            for (int r = 0; r < R; ++r) {\n                int32x4_t a;\n                if (MEMACC) a = vaddq_s32(accb[0][r], accb[1][r]);\n                else if (NCH == 1) a = acc[r];\n                else if (NCH == 2) a = vaddq_s32(acc[r], acc[R + r]);\n                else a = vaddq_s32(vaddq_s32(acc[r], acc[R + r]), vaddq_s32(acc[2 * R + r], acc[3 * R + r]));\n                facc[r] = vmlaq_f32(facc[r], vcvtq_f32_s32(a), dvec);\n            }\n        }\n        const int col = 2 * (np % NB);\n        for (int r = 0; r < R; ++r) {\n            float32x4_t f = facc[r];\n            float32x2_t row0 = vmul_n_f32(vget_low_f32(vuzp1q_f32(f, f)), da[2 * r]);\n            float32x2_t row1 = vmul_n_f32(vget_low_f32(vuzp2q_f32(f, f)), da[2 * r + 1]);\n            vst1_f32(obuf + (size_t)(2 * r) * (2 * NB) + col, row0);\n            vst1_f32(obuf + (size_t)(2 * r + 1) * (2 * NB) + col, row1);\n        }\n        if ((np + 1) % NB == 0) flush_obuf<R>(obuf, out, m_valid, np + 1 - NB, accum);\n    }\n}\n\n#define MV_SUB(jj, W, Y, SV, LANE) do { \\\n    int32x4_t dd = vdotq_s32(zero32, vreinterpretq_s8_u8(W), Y); \\\n    a##jj = vmlaq_laneq_s32(a##jj, dd, SV, LANE); } while (0)\n#define MV_SUB0(jj, W, Y, SV, LANE) do { \\\n    int32x4_t dd = vdotq_s32(zero32, vreinterpretq_s8_u8(W), Y); \\\n    a##jj = vmulq_laneq_s32(dd, SV, LANE); } while (0)\n\nKFN void mv_col(const uint8_t* blk, const int8_t* y, int32x4_t& tot, const int32x4_t zero32, const uint8x16_t m4) {\n    int32x4_t S[4];\n    ld_scales(blk + OFF_SC, S);\n    int32x4_t a0, a1, a2, a3;\n#pragma clang loop unroll(full)\n    for (int h = 0; h < 2; ++h) {\n        const uint8_t* ql = blk + h * 64;\n        const uint8_t* qh = blk + OFF_QH + h * 32;\n        uint8x16_t A0 = vld1q_u8(ql), A1 = vld1q_u8(ql + 16), B0 = vld1q_u8(ql + 32), B1 = vld1q_u8(ql + 48);\n        uint8x16_t Q0 = vld1q_u8(qh), Q1 = vld1q_u8(qh + 16);\n        const int8_t* yy = y + h * 128;\n        int8x16_t y0 = vld1q_s8(yy), y1 = vld1q_s8(yy + 16), y2 = vld1q_s8(yy + 32), y3 = vld1q_s8(yy + 48);\n        int8x16_t y4 = vld1q_s8(yy + 64), y5 = vld1q_s8(yy + 80), y6 = vld1q_s8(yy + 96), y7 = vld1q_s8(yy + 112);\n        uint8x16_t w[8];\n        dec_half(A0, A1, B0, B1, Q0, Q1, m4, kT, w);\n        if (h == 0) {\n            MV_SUB0(0, w[0], y0, S[0], 0); MV_SUB0(1, w[1], y1, S[0], 1); MV_SUB0(2, w[2], y2, S[0], 2); MV_SUB0(3, w[3], y3, S[0], 3);\n            MV_SUB(0, w[4], y4, S[1], 0); MV_SUB(1, w[5], y5, S[1], 1); MV_SUB(2, w[6], y6, S[1], 2); MV_SUB(3, w[7], y7, S[1], 3);\n        } else {\n            MV_SUB(0, w[0], y0, S[2], 0); MV_SUB(1, w[1], y1, S[2], 1); MV_SUB(2, w[2], y2, S[2], 2); MV_SUB(3, w[3], y3, S[2], 3);\n            MV_SUB(0, w[4], y4, S[3], 0); MV_SUB(1, w[5], y5, S[3], 1); MV_SUB(2, w[6], y6, S[3], 2); MV_SUB(3, w[7], y7, S[3], 3);\n        }\n    }\n    tot = vaddq_s32(vaddq_s32(a0, a1), vaddq_s32(a2, a3));\n}\n\nKFN void run_mv2(const int8_t* q8, float da, const uint8_t* B, float* out) {\n    const int32x4_t zero32 = vdupq_n_s32(0);\n    const uint8x16_t m4 = vdupq_n_u8(0x0F);\n    for (int np = 0; np < N / 2; ++np) {\n        const uint8_t* b0 = B + (size_t)(2 * np) * K_bytes;\n        const uint8_t* pf = b0 + (size_t)MVPF * K_bytes;\n        const uint8_t* pg = b0 + (size_t)MV2PF * K_bytes;\n        float32x4_t facc0 = vdupq_n_f32(0.f), facc1 = vdupq_n_f32(0.f);\n        for (int i = 0; i < K_blk; ++i, b0 += BLK, pf += BLK, pg += BLK) {\n            PIN(b0); PIN(pf);\n            const int8_t* y = q8 + i * 256;\n            const uint8_t* blk0 = b0;\n            const uint8_t* blk1 = b0 + K_bytes;\n            PFK_BLK(pf);\n            PFK_BLK(pf + K_bytes);\n            if (MV2PF > 0) { PIN(pg); PF2_BLK(pg); PF2_BLK(pg + K_bytes); }\n            uint16_t w0, w1; memcpy(&w0, blk0 + OFF_D, 2); memcpy(&w1, blk1 + OFF_D, 2);\n            float32x4_t v = vcvt_f32_f16(vreinterpret_f16_u16(vcreate_u16((uint64_t)w0 | ((uint64_t)w1 << 16))));\n            int32x4_t t0, t1;\n            mv_col(blk0, y, t0, zero32, m4);\n            mv_col(blk1, y, t1, zero32, m4);\n            facc0 = vfmaq_laneq_f32(facc0, vcvtq_f32_s32(t0), v, 0);\n            facc1 = vfmaq_laneq_f32(facc1, vcvtq_f32_s32(t1), v, 1);\n        }\n        float32x4_t sums = vpaddq_f32(facc0, facc1);\n        float32x2_t s2 = vpadd_f32(vget_low_f32(sums), vget_high_f32(sums));\n        vst1_f32(out + 2 * np, vmul_n_f32(s2, da));\n    }\n}\n\n} // namespace\n\n#define TILE_ENTRY(NAME, R, PFNP) \\\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void NAME(const int8_t* gp, \\\n    const float* da, const uint8_t* B, float* out, int m_valid, int i0, int i1, int accum) { \\\n    run_rows<R, PFNP>(gp, da, B, out, m_valid, i0, i1, accum); }\nTILE_ENTRY(rr16, 16, 1)\nTILE_ENTRY(rr8, 8, 1)\nTILE_ENTRY(rr4, 4, 1)\nTILE_ENTRY(rr2, 2, 1)\nTILE_ENTRY(rr1, 1, 1)\n\nextern \"C\" __attribute__((noinline, target(\"i8mm\"))) void mv2(const int8_t* q8,\n    float da, const uint8_t* B, float* out) { run_mv2(q8, da, B, out); }\n\nextern \"C\" void inner_gemm(const uint16_t* A, float* output, const uint8_t* B_blocks, int M)\n{\n    const int P = (M + 1) / 2;\n    static std::vector<int8_t> apack;\n    static std::vector<float> dav;\n    if ((int)apack.size() < P * K_blk * 512) {\n        apack.resize((size_t)P * K_blk * 512);\n        dav.resize((size_t)P * 2);\n    }\n    alignas(16) static int8_t q8[2][K];\n\n    if (M == 1) {\n        float da;\n        quantize_row(A, q8[0], &da);\n        mv2(q8[0], da, B_blocks, output);\n        return;\n    }\n\n    struct Grp { int p0, R; };\n    Grp gs[64]; int ng = 0;\n    int p = 0;\n    while (p < P) {\n        const int rem = P - p;\n        const int R = rem >= 16 ? 16 : (rem >= 8 ? 8 : (rem >= 4 ? 4 : (rem >= 2 ? 2 : 1)));\n        gs[ng++] = {p, R};\n        int8_t* gbase = apack.data() + (size_t)p * K_blk * 512;\n        for (int r = 0; r < R; ++r) {\n            const int pp = p + r;\n            for (int rr = 0; rr < 2; ++rr) {\n                const int m = 2 * pp + rr;\n                if (m < M) {\n                    quantize_row(A + (size_t)m * K, q8[rr], &dav[2 * pp + rr]);\n                } else {\n                    memset(q8[rr], 0, K);\n                    dav[2 * pp + rr] = 0.f;\n                }\n            }\n            pack_pair_group(q8[0], q8[1], gbase, R, r);\n        }\n        p += R;\n    }\n\n    int gi = 0;\n    while (gi < ng) {\n        const int R = gs[gi].R;\n        int ge = gi;\n        while (ge < ng && gs[ge].R == R) ++ge;\n        const int ks = R == 16 ? KS16 : (R == 8 ? KS8 : (R == 4 ? KS4 : (R == 2 ? KS2 : KS1)));\n        for (int i0 = 0; i0 < K_blk; i0 += ks) {\n            const int i1 = i0 + ks < K_blk ? i0 + ks : K_blk;\n            const int accum = i0 != 0;\n            for (int g = gi; g < ge; ++g) {\n                const int p0 = gs[g].p0;\n                const int8_t* gp = apack.data() + (size_t)p0 * K_blk * 512;\n                const float* dv = dav.data() + (size_t)p0 * 2;\n                float* out = output + (size_t)(2 * p0) * N;\n                const int m_valid = M - 2 * p0;\n                if (R == 16)     rr16(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 8) rr8(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 4) rr4(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else if (R == 2) rr2(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n                else             rr1(gp, dv, B_blocks, out, m_valid, i0, i1, accum);\n            }\n        }\n        gi = ge;\n    }\n}\n"
+  }
+ ],
+ "provenance": {
+  "run": "e2e-fable-lane1",
+  "submitted_version": "v17.cpp",
+  "time_speedup": 2.7407442871994214,
+  "evaluations": 20,
+  "server_calls": 43
+ }
+}